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WCSS0418V1P Datasheet, PDF (9/17 Pages) Weida Semiconductor, Inc. – 256K x 18 Synchronous-Pipelined Cache RAM
WCSS0418V1P
AC Test Loads and Waveforms
OUTPUT
Z0 =50Ω
3.3V
OUTPUT
RL =50Ω
5 pF
VL = 1.5V
(a)
INCLUDING
JIG AND
SCOPE
R=317Ω
R=351Ω
2.5V
GND
10%
≤ 2.5 ns
ALL INPUT PULSES[10]
90%
90%
10%
≤ 2.5 ns
(b)
(c)
Switching Characteristics Over the Operating Range[11, 12, 13]
-166
-133
-100
Parameter
Description
Min.
Max.
Min.
Max.
Min. Max. Unit
tCYC
tCH
tCL
tAS
tAH
tCO
tDOH
tADS
tADH
tWES
Clock Cycle Time
6.0
7.5
10
ns
Clock HIGH
1.7
1.9
3.5
ns
Clock LOW
1.7
1.9
3.5
ns
Address Set-Up Before CLK Rise
2.0
2.5
2.5
ns
Address Hold After CLK Rise
0.5
0.5
0.5
ns
Data Output Valid After CLK Rise
3.5
4.0
5.5
ns
Data Output Hold After CLK Rise
1.5
2.0
2.0
ns
ADSP, ADSC Set-Up Before CLK Rise 2.0
2.5
2.5
ns
ADSP, ADSC Hold After CLK Rise
0.5
0.5
0.5
ns
BWE, GW, BW[1:0] Set-Up Before CLK 2.0
2.5
2.5
ns
Rise
tWEH
BWE, GW, BW[1:0] Hold After CLK Rise 0.5
0.5
0.5
ns
tADVS
ADV Set-Up Before CLK Rise
2.0
2.5
2.5
ns
tADVH
ADV Hold After CLK Rise
0.5
0.5
0.5
ns
tDS
Data Input Set-Up Before CLK Rise
2.0
2.5
2.5
ns
tDH
Data Input Hold After CLK Rise
0.5
0.5
0.5
ns
tCES
Chip Select Set-Up
2.0
2.5
2.5
ns
tCEH
tCHZ
tCLZ
tEOHZ
tEOLZ
tEOV
Chip Select Hold After CLK Rise
Clock to High-Z[12]
Clock to Low-Z[12]
OE HIGH to Output High-Z[12, 13]
OE LOW to Output Low-Z[12, 13]
OE LOW to Output Valid[12]
0.5
0.5
0.5
ns
3.5
3.5
3.5
ns
0
0
0
ns
3.5
3.5
5.5
ns
0
0
0
ns
3.5
4.0
5.5
ns
Notes:
10. Input waveform should have a slew rate of 1 V/ns.
11. Unless otherwise noted, test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output
loading of the specified IOL/IOH and load capacitance. Shown in (a) and (b) of AC Test Loads.
12. tCHZ, tCLZ, tEOV, tEOLZ, and tEOHZ are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ± 200 mV from
steady-state voltage.
13. At any given voltage and temperature, tEOHZ is less than tEOLZ and tCHZ is less than tCLZ.
Document #: 38-05247
Page 9 of 17