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| EZ80F917050SBCG Datasheet, PDF (9/30 Pages) Zilog, Inc. – Factory-default operating clock frequency at 50 MHz | |||
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Zdots® SBC for eZ80AcclaimPlus!⢠Connectivity ASSP
Product Specification
5
Table 1. Zdots Peripheral Bus Connector Pin Identification*
Pin No Symbol
1
Reserved
2
Reserved
3
Reserved
4
Reserved
5
TRSTN
6
Reserved
7
F91_WE
8
Reserved
9
GND
10
VCC
11 A6
12 A0
13 A10
14 A3
15 GND
16
VCC
17 A8
18 A7
19 A13
20 A9
21 A15
22 A14
23 A18
24 A16
25 A19
26 GND
27 A2
Pull
Up/Down* Signal Direction Comments
Input
Reset for on-chip instrumentation (OCI).
PU 10 k⦠Input
A Low enables a Write to on-chip Flash
memory. If this pin is unconnected, on-chip
Flash memory is Write-protected.
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
VSS/Ground (0 V).
3.3 V supply input pin.
VSS/Ground (0 V).
3.3 V supply input pin.
VSS/Ground (0 V).
PS026102-1207
Pin Description
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