EZ80F917050SBCG Datasheet, PDF (27/30 Pages) Zilog, Inc. – Factory-default operating clock frequency at 50 MHz

Schematics
Zdots^® SBC for eZ80AcclaimPlus!^™ Connectivity ASSP
Product Specification
23
Figure 8 through Figure 10 displays the layout of the Zdots. Ethernet circuiting devices are not loaded on the Zdots. However, these devices appear
in the following schematics for reference.
A[0..23]
D[0..7]
-CS[0..3]
5
A[0..23]
D[0..7]
-CS[0..3]
VCC VCC
R1
4.7K
R2
4.7K
IICSDA
IICSCL
IICSDA
IICSCL
D
CLK_OUT
CLK_OUT
-DIS_FLASH
-DIS_FLASH
IICSDA
IICSCL
EZ80CLK
JP3
1
2
-FLASHWE
RTC_VDD
PA[0..7]
PB[0..7]
PC[0..7]
PD[0..7]
-RESET
-RD
-WR
C
-IOREQ
-MREQ
-INSTRD
-WAIT
-HALT_SLP
-BUSREQ
-BUSACK
-NMI
-FLASHWE
RTC_VDD
PA[0..7]
PB[0..7]
PC[0..7]
PD[0..7]
-RESET
-RD
-WR
-IOREQ
-MREQ
-INSTRD
-WAIT
-HALT_SLP
-BUSREQ
-BUSACK
-NMI
WR_EN
VCC
R5
2.2K
R6
2.2K
-WAIT
-BUSREQ
VCC VCC
R7
R8
10K
10K
4
connector 1
JP1
1
3
-TRSTN
5
-F91_WE
7
GND
9
A6
11
A10
13
GND
15
A8
17
A13
19
A15
21
A18
23
A19
25
A2
27
A11
29
A4
31
A5
33
35
A21
37
A22
39
-CS0
41
-CS2
43
D1
45
D3
47
D5
49
D7
51
-MREQ 53
GND
55
-WR 57
-BUSACK 59
2
4
6
8
10
VCC
12 A0
14 A3
16
VCC
18 A7
20 A9
22 A14
24 A16
26
GND
28
A1
30
A12
32
A20
34 A17
36 -DIS_FLASH
38
VCC
40 A23
42 -CS1
44 D0
46 D2
48 D4
50 GND
52 D6
54 -IOREQ
56 -RD
58 -INSTRD
60 -BUSREQ
HEADER 30x2/SM
VCC
3
connector 2
JP2
PA7 1
PA5 3
PA3
5
PA1
7
VCC
9
PB7 11
PB5 13
PB3 15
PB1 17
GND
19
PC6 21
PC4 23
PC2 25
PC0 27
PD6 29
PD5 31
PD3 33
PD1 35
TDO 37
GND
39
TCK 41
RTC_VDD43
IICSCL 45
IICSDA 47
-FLASHWE49
-CS3 51
-RESET 53
VCC 55
-HALT_SLP 57
VCC 59
2 PA6
4 PA4
6 PA2
8 PA0
10
GND
12 PB6
14 PB4
16 PB2
18 PB0
20 PC7
22 PC5
24 PC3
26 PC1
28 PD7
30
GND
32 PD4
34 PD2
36 PD0
38 TDI
40 TRIGOUT
42 TMS
44
EZ80CLK
46
48
GND
50
52
-DIS_IRDA
54 -WAIT
56 GND
58 -NMI
60
HEADER 30x2/SM
TDI
TDO
TRIGOUT
TCK
TMS
-TRSTN
B
VCC
TDI
TDO
R20
TRIGOUT
10K
TCK
TMS
-TRSTN
R9
4.7K
-DIS_IRDA
R12
10K
U1C
5
6
74LCX04
TSSOP14
U4B
DISABLE_IRDA
4
6
PD2= IR_SD 5
74LCX32
TSSOP14
U1B
3
4
74LCX04
TSSOP14
U1F
13
12
GND
74LCX04
TSSOP14
U4A
1
3
2
74LCX32
TSSOP14
U4D
12
11
13
GND
74LCX32
TSSOP14
IRDA_SD
2
1
-F91_WE
R37
10K
U1A
1
2
74LCX04
TSSOP14
-F91_WP
-F91_WP
VCC
D
R3
C1
R4
68R
2R7
(MMA 0204)
PD0
IRDA_SD
PD1
330nF
U2
5 _VCC
1 _LEDA
2 _TXD
4 _SD
3 _RXD
6 _GND
ZHX1810
C
B
VCC
VCC
C2
0.1uF
U3
RESET
2
open-drain
MAX6328UR29
SOT-23-L3
R10
10K
-RESET
C3
0.01uF
VCC
A
VCC
VCC
GND
GND
GND
alternative:
Maxim
MAX6802UR29D3
This schematic reflects the
Memory
A
assembly rev B of the module.
The FLASH memory on page 3
was changed to AM29008B for
Rev D schematic.
5
PS026102-1207
4
3
2
Figure 8. Zdots Schematic Diagram—Connectors and Miscellaneous
1
Schematics