EZ80F917050SBCG Datasheet, PDF (17/30 Pages) Zilog, Inc. – Factory-default operating clock frequency at 50 MHz

Zdots^® SBC for eZ80AcclaimPlus!^™ Connectivity ASSP
Product Specification
13
Table 3. Zdots MII Resistor Configuration (Continued)
R24
R19
R23
R21
ANEG (Tech[2]) (Tech[1]) (Tech[0]) Speed Full-Duplex ANEG-EN Capabilities ANEG
IN
OUT
OUT
IN
No
No
No
100FD Disabled
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
No
Yes²
Yes²
Yes²
Yes²
Yes²
Yes²
Yes²
Yes³
No
Yes²
Yes²
Yes²
Yes²
Yes²
Yes²
Yes²
Yes²
No
Yes³
Yes³
Yes³
Yes³
Yes³
Yes³
Yes³
Yes³
100FD
None
10HD
100HD
100HD,
10HD
None
10FD/HD
100FD/HD
All
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Notes
1. MII Register 0 (Speed and Duplex Bits) must be set by a MAC to achieve a link.
2. When autonegotiation is enabled, these bits are written but will be ignored by PHY.
3. The advertised abilities of MII Register 4 cannot exceed the abilities of MII Register 1. Autonegotiation must
always be enabled.
Ethernet LEDs
The Ethernet connection is provided by the HALO RJ45 connector. It consists of two
green LEDs that are located next to each other on the Zdots^®. When PHY is receiving
data, the left LED is ON. When the PHY is transmitting data, the right LED is ON.
Fast Buffer (U10)
The Zdots has a fast buffer that (see Figure 1 on page 3) exists to prevent bus contention
that occurs because of slow turn-off time of the module’s external Flash and the fast bus
turn-around time of the eZ80F91 (generic feature of the eZ80^® family when it is used in
NATIVE mode).
The problem related to bus contention when using eZ80 family of the microprocessors in
NATIVE eZ80 mode is explained below, see Figure 4 on page 14. For more details, refer
to eZ80F91 Product Specification (PS0192).
Bus contention occurs when two or more devices drive a common bus. The eZ80F91’s
CS0 drives the Flash CE. After the access to Flash, CS0 is driven High a maximum of
8.8 ns after the next rising edge of the Clock (T6 in Figure 4). The Flash turn-off time
(T_OD) is 25 ns, which is the time from OE or CE going High to the Flash output drivers
PS026102-1207
Onboard Component Description