Z85C3008VSG Datasheet, PDF (64/81 Pages) Zilog, Inc. – CMOS SCC Serial Communications Controller

CMOS SCC Serial Communications Controller
Product Specification
56
Table 7 lists the general timing characteristics for the Z85C30 device.
Table 7. Z85C30 General Timing Table
8.5 MHz
10 MHz
16 MHz
No Symbol
Parameter
Min Max Min Max Min Max
1
TdPC(REQ)
PCLK to W/REQ Valid
250
150
80
2
TdPC(W)
PCLK to Wait Inactive
3
TsRXC(PC)
RxC to PCLK Setup Time^1,2
4
TsRXD(RXCr) RxD to RxC Setup Time¹
5
ThRXD(RxCr) RxD to /RXC Hold Time¹
6
TsRXD(RXCf) RxD to /RXC Setup Time^1,3
7
ThRXD(RXCf) RxD to /RXC Hold Time^1,3
8
TsSY(RXC)
SYNC to RxC Setup Time¹
9
ThSY(RXC)
SYNC to RxC Hold Time¹
10 TsTXC(PC)
TxC to PCLK Setup Time^4,5
11
TdTXCf(TXD)
TxC to TxD Delay⁴
12
TdTxCr(TXD)
TxC to TxD Delay^3,4
350
250
180
N/A
N/A
N/A
0
0
0
150
125
50
0
0
0
150 1
25
50
–200
–150
–100
5TcPc
5TcPc
5TcPc
N/A
N/A
N/A
200
150
80
200
150
80
13 TdTXD(TRX)
14a TwRTXh
14b TwRTXh(E)
15a TwRTXI
15b TwRTXI(E)
16a TcRTX
16b TcRTX(E)
17 TcRTXX
18 TwTRXh
TxD to TRxC Delay
RTxC High Width⁶
RTxC High Width⁷
TRxC Low Width⁶
RTxC Low Width⁷
RTxC Cycle Time^6,8
RTxC Cycle Time⁷
Crystal Osc. Period⁹
TRxC High Width⁶
200
140
80
150
120
80
50
40
15.6
150
120
80
50
40
15.6
488
400
244
125
100
31.25
125 1000 100 1000 62 1000
150
120
180
Notes:
1. RxC is RTxC or TRxC, whichever is supplying the receive clock.
2. Synchronization of RxC to PCLK is eliminated in divide by four operation.
3. Parameter applies only to FM encoding/decoding.
4. TxC is TRxC or /RTxC, whichever is supplying the transmit clock.
5. External PCLK to RTxC or TxC synchronization requirement eliminated for PCLK divide-by-four operation.TRxC
and RTxC rise and fall times are identical to PCLK. Reference timing specs TfPC and TrPC.Tx and Rx input
clock slew rates should be kept to a maximum of 30 nsec. All parameters related to input CLK edges must be
referenced at the point at which the transition begins or ends, whichever is worst case.
6. Parameter applies only for transmitter and receiver; DPLL and Baud Rate Generator timing requirements are
identical to case PCLK requirements.
7. Enhanced Feature — RTxC used as input to internal DPLL only.
8. The maximum receive or transmit data rate is 1/4 PCLK.
9. Both RTxC and SYNC have 30 pF capacitors to ground connections.
PS011706-0511
Electrical Characteristics