Z8673312PSG Datasheet, PDF (59/84 Pages) Zilog, Inc. – CMOS Z8 OTP Microcontrollers

CMOS Z8^® OTP Microcontrollers
Product Specification
55
When more than one interrupt is pending, priorities are resolved by a programmable prior-
ity encoder that is controlled by the Interrupt Priority Register (IPR). An interrupt machine
cycle is activated when an interrupt request is granted. Thus, disabling all subsequent
interrupts, saves the Program Counter and Status Flags, and then branches to the program
memory vector location reserved for that interrupt. All interrupts are vectored through
locations in the program memory. This memory location and the next byte contain the 16-
bit starting address of the interrupt service routine for that particular interrupt request.
To accommodate polled interrupt systems, interrupt inputs are masked and the interrupt
request register is polled to determine which of the interrupt requests need service.
An interrupt resulting from AN1 is mapped into IRQ2, and an interrupt from AN2 is
mapped into IRQ0. Interrupts IRQ2 and IRQ0 may be rising, falling or both edge trig-
gered, and are programmable by the user. The software may poll to identify the state of the
pin.
Programming bits for the Interrupt Edge Select are located in bits D7 and D6 of the IRQ
Register (R250). The configuration is shown in Table 21.
Table 21. IRQ Register Configuration
IRO
D7
D6
0
0
0
1
1
0
1
1
Notes
1. F = Falling Edge
2. R = Rising Edge
Interrupt Edge
P31
P32
F
F
F
R
R
F
R/F
R/F
Clock. The on-chip oscillator has a high-gain, parallel-resonant amplifier for connection
to a crystal, RC, ceramic resonator, or any suitable external clock source (XTAL1 = Input,
XTAL2 = Output). The crystal should be AT cut, 10 kHz to 16 MHz max, with a series
resistance (RS) less than or equal to 100 Ω.
The crystal should be connected across XTAL1 and XTAL2 using the vendor’s recom-
mended capacitor values from each pin directly to device pin Ground. The RC oscillator
option can be selected in the programming mode. The RC oscillator configuration must be
an external resistor connected from XTAL1 to XTAL2, with a frequency-setting capacitor
from XTAL1 to Ground (Table 29).
PS022901-0508
Electrical Characteristics