Z8673312PSG Datasheet, PDF (37/84 Pages) Zilog, Inc. – CMOS Z8 OTP Microcontrollers

CMOS Z8^® OTP Microcontrollers
Product Specification
33
Table 16. Additional Timing Table (Divide-By-One Mode) T_A = -40 °C to +105 °C (Continued)
No Symbol Parameter
V_CC1 Min Max Min Max Units Notes
2
TrC,TfC Clock Input Rise & Fall 4.5V
25
25
ns
2,3,4
Times
5.5V
25
25
ns
2,3,4
3
TwC
Input Clock Width
4.5V 100
100
ns
2,3,4
5.5V 100
100
ns
2,3,4
4
TwTinL Timer Input Low Width 4.5V 100
100
ns
2,3,4
5.5V 70
70
ns
2,3,4
5
TwTinH Timer Input High Width 4.5V 5TpC
5TpC
2,3,4
5.5V 5TpC
5TpC
2,3,4
6
TpTin Timer Input Period
4.5V 8TpC
8TpC
2,3,4
5.5V 8TpC
8TpC
2,3,4
7
TrTin, Timer Input Rise & Fall 4.5V
100
TfTin
Timer
5.5V
100
100 ns
100 ns
2,3,4
2,3,4
8A TwIL
Int. Request Low Time 4.5V 100
100
ns
2,3,4,5
5.5V 70
70
ns
2,3,4,5
8B TwIL
Int. Request Low Time 4.5V 5TpC
5TpC
2,3,4,6
5.5V 5TpC
5TpC
2,3,4,6
9
TwIH
Int. Request Input High 4.5V 5TpC
Time
5.5V 5TpC
5TpC
5TpC
2,3,4,5
2,3,4,5
10
Twsm Stop Mode Recovery 4.5V 12
12
ns
4,7
Width Spec
5.5V 12
12
ns
4,7
11
Tost
Oscillator Startup Time 4.5V
5TpC
5TpC
4,7,8
5.5V
5TpC
5TpC
4,7,8
Notes
1. The V_CC voltage specification of 5.5 V guarantees 5.0 V ± 0.5 V and the V_CC voltage specification of 3.5 V
guarantees only 3.5 V.
2. Timing Reference uses 0.7 V_CC for a logic 1 and 0.2 V_CC; for a logic 0.
3. SMR D1 = 0.
4. Maximum frequency for internal system clock is 4 MHz when using Low EMI OSC PCON Bit D7=0.
5. Interrupt request via Port 3 (P31-P33).
6. Interrupt request via Port 3 (P30).
7. SMR-D5 = 1, POR STOP Mode Delay is on.
8. For RC and LC oscillator, and for oscillator driven by clock driver.
PS022901-0508
Electrical Characteristics