Z8E001 Datasheet, PDF (44/49 Pages) Zilog, Inc. – CMOS OTP Microcontroller

Z8E001
CMOS OTP Microcontroller
I/O PORT RESET CONDITIONS
Full Reset
Port A and Port B output value registers are not affected
by RESET.
On RESET, the Port A and Port B directional control reg-
isters will be cleared to all zeros, which will define all pins
in both ports as inputs.
On RESET, since the directional control registers have re-
defined all pins as inputs, the Port A and Port B input value
Zilog
registers will have the previously held data overwritten with
the current sample of the input pins.
On RESET, the Port A and Port B special function regis-
ters will be cleared to all zeros, which will deactivate all
port special functions.
Note: The SMR and WDT timeout events are NOT full
device resets. None of the port control registers is effected
by either of these events.
ANALOG COMPARATOR
The Z8E001 includes one on-chip analog comparator.
Pin PB4 has a comparator front end. The comparator ref-
erence voltage is on pin PB3.
Comparator Description
The on-chip comparator can process an analog signal on
PB4 with reference to the voltage on PB3. The analog
function is enabled by programming the Port B Special
Function Register bits 3 and 4.
When the analog comparator function is enabled, bit 4 of
the input register will be defined as holding the synchro-
nized output of the comparator, while bit 3 will retain a syn-
chronized sample of the reference input.
If the interrupts for PB4 are enabled when the comparator
special function is selected, the output of the comparator
will generate interrupts.
COMPARATOR OPERATION
The comparator output reflects the relationship between
the analog input to the reference input. If the voltage on
the analog input is higher than the voltage on the refer-
ence input, then the comparator output will be at a high
state. If the voltage on the analog input is lower than the
voltage on the reference input, then the analog output will
be at a Low state.
Comparator Definitions
V_ICR
The usable voltage range for the positive input and the ref-
erence input is called the common mode voltage range (V_I-
CR^{). The comparator is not guaranteed to work if the input}
is outside of the V_ICR range.
V_offset
The absolute value of the voltage between the positive in-
put and the reference input required to make the compar-
ator output voltage switch is the input offset voltage (V_off-
set^).
I_IO
For the CMOS voltage comparator input, the input offset
current (I_IO) is the leakage current of the CMOS input gate.
HALT Mode
The analog comparator is functional during HALT Mode. If
the interrupts are enabled, an interrupt generated by the
comparator will cause a return from HALT Mode.
STOP Mode
The analog comparator is disabled during STOP Mode.
The comparator is powered down to prevent it from draw-
ing any current.
44
PRELIMINARY
DS97Z8X1300