Z8E001 Datasheet, PDF (30/49 Pages) Zilog, Inc. – CMOS OTP Microcontroller

Z8E001
CMOS OTP Microcontroller
The internal timers can be used to trigger external events
by toggling the PB1 output when generating an interrupt.
This functionality can only be achieved in conjunction with
the port unit defining the appropriate pin as an output sig-
nal with the timer output special function enabled. In this
mode, the appropriate port output will be toggled when the
timer count reaches 0, and will continue toggling each time
that the timer times out.
T_OUT Mode
The PortB special function register PTBSFR (0D7H) (Fig-
ure 20), is used in conjunction with the Port B directional
control register PTBDIR (0D6) (Figure 21) to configure
PB1 for T_OUT operation for timer0. In order for T_OUT to func-
tion, PB1 must be defined as an output line by setting PT-
Zilog
BCTL bit 1 to 1. Configured in this way, PB1 has the capa-
bility of being a clock output for timer0, toggling the PB1
output pin on each timer0 timeout.
At end-of-count, the interrupt request line IRQ0 , clocks a
toggle flip-flop. The output of this flip-flop drives the T_OUT
line, PB1. In all cases, when timer0 reaches its end-of-
count, T_OUT toggles to its opposite state (Figure 22). If, for
example, timer0 is in Continuous Counting Mode, Tout will
have a 50 percent duty cycle output. This duty cycle can
easily be controlled by varying the initial values after each
end-of-count.
0D7
PTBSFR
D7
D6 D5 D4
D3 D2
D1 D0
1 = ENABLE BIT 0 AS SMR INPUT
0 = NO SPECIAL FUNCTIONALITY
1 = ENABLE BIT 1 AS TIMER0 OUTPUT
0 = NO SPECIAL FUNCTIONALITY
1 = ENABLE BIT 2 AS INT1 INPUT
0 = NO SPECIAL FUNCTIONALITY
D4 D3 COMPAR. INTERRUPTS
--- --- -------------- -------------------
0 0 DISABLED DISABLED
0 1 ENABLED DISABLED
1 0 DISABLED ENABLED
1 1 ENABLED ENABLED
BIT 3: COMP. REF. INPUT
BIT 4: COMP. SIGNAL INPUT/
INT0/INT2
RESERVED (MUST BE 0)
Figure 22. PortB Special Function Register (T_out Operation)
30
PRELIMINARY
DS97Z8X1300