Z86C72 Datasheet, PDF (30/71 Pages) Zilog, Inc. – IR MICROCONTROLLER

Z86C72/C92/L72/L92
IR Microcontroller
FUNCTIONAL DESCRIPTION
The Z8^® incorporates special functions to enhance func-
tionality in consumer and battery operated applications.
Reset. The device is reset in one of the following condi-
tions:
1. Power-On Reset
2. Watch-Dog Timer
3. Stop-Mode Recovery Source
4. Low Voltage Detection
5. External Reset
Program Memory. The Z86L/C72 addresses up to 16K of
internal program memory, with the remainder being exter-
nal memory (Figure 17). The first 12 bytes of program
memory are reserved for the interrupt vectors. These loca-
tions contain five 16-bit vectors that correspond to the five
available interrupts. At addresses 16K and greater, the
Z86L/C72 executes external program memory fetches (re-
fer to external memory timing specifications).
The Z86L72/C92 addresses up to (64K - 512 KB) of exter-
nal program memory beginning at address 0. This is also
true of the Z86L/C72 when the R//RL input is forced to a
low.
RAM. The Z86L72 has a 768-byte RAM. 256 bytes make
up the Register file. The remaining 512 bytes make up the
Extended Data RAM.
Extended Data RAM. The Extended Data RAM occupies
the address range FE00H-FFFFH (512 bytes). This range
of external addresses is replaced by the internal Extended
Data RAM and cannot be used to directly write to or read
from External Memory. Accessing the Extended Data
RAM is accomplished by using LDE, LDEI, LDC, or LDCI
instructions. Port 1 and Port 0 are free to be set as I/O or
ADDR/DATA modes (except for high-impedance) when
accessing Extended Data RAM. In addition, if the External
Memory uses the same address range as the Extended
Data RAM, it can be used as the External Stack only.
Note: The Extended Data RAM cannot be used as STACK
or instruction/code memory. Accessing the Extended Data
RAM has the following condition: P01M register bits D4-D3
cannot be set to 11.
Zilog
16384
Location of
First Byte of
Instruction
Executed
After RESET
12
11
10
9
8
7
Interrupt
Vector
(Lower Byte) ⁶
5
4
Interrupt
Vector
(Upper Byte) ³
2
1
0
External ROM
On-Chip
ROM
Reset Start Address
Reserved
Reserved
IRQ4
IRQ4
IRQ3
IRQ3
IRQ2
IRQ2
IRQ1
IRQ1
IRQ0
IRQ0
Figure 17. L72/C72 Program Memory Map
6-30
PRELIMINARY
DS97LVO0900