Z86C72 Datasheet, PDF (15/71 Pages) Zilog, Inc. – IR MICROCONTROLLER

Zilog
AC CHARACTERISTICS (Z86C72/C92 SPECIFICATIONS)
Preliminary
External I/O or Memory Read and Write Timing Table
T_A = 0°C to +70°C
16.0 MHz
No
Symbol
Parameter
V_CC
Min
Max
1 TdA(AS)
Address Valid to /AS
4.5V
25
Rising Delay
5.5V
25
2 TdAS(A)
/AS Rising to Address 4.5V
35
Float Delay
5.5V
35
3 TdAS(DR) /AS Rising to Read
4.5V
180
Data Required Valid
5.5V
180
4 TwAS
/AS Low Width
4.5V
40
5.5V
40
5 Td
Address Float to /DS
4.5V
0
Falling
5.5V
0
6 TwDSR
/DS (Read) Low Width 4.5V
135
5.5V
135
7 TwDSW
/DS (Write) Low Width 4.5V
80
5.5V
80
8 TdDSR(DR) /DS Falling to Read
4.5V
75
Data Required Valid
5.5V
75
9 ThDR(DS) Read Data to
4.5V
0
/DS Rising Hold Time
5.5V
0
10 TdDS(A)
/DS Rising to Address 4.5V
50
Active Delay
5.5V
50
11 TdDS(AS) /DS Rising to /AS
4.5V
35
5.5V
35
12 TdR/W(AS) R//W Valid to /AS
4.5V
25
Rising Delay
5.5V
25
13 TdDS(R/W) /DS Rising to
R//W Not Valid
4.5V
35
5.5V
35
14 TdDW(DSW) Write Data Valid to
4.5V
25
/DS Falling (Write)
5.5V
25
Delay
15
TdDS(DW) /DS Rising to Write
4.5V
35
Data Not Valid Delay
5.5V
35
16
TdA(DR) Address Valid to Read 4.5V
230
Data Required Valid
5.5V
230
17
TdAS(DS) /AS Rising to /DS
4.5V
45
Falling Delay
5.5V
45
18
TdM(AS) /DM Valid to /AS
4.5V
30
Falling Delay
5.5V
30
19
TdDS(DM) /DS Rise to /DM Valid
4.5V
70
Delay
5.5V
70
20
ThDS(A) /DS Rise to Address
4.5V
70
Valid Hold Time
5.5V
70
Notes:
1. When using extended memory timing add 2 TpC.
2. Timing numbers given are for minimum TpC.
Standard Test Load
All timing references use 0.9 V_CC for a logic 1 and 0.1 V_CC for a logic 0.
DS97LVO0900
PRELIMINARY
Z86C72/C92/L72/L92
IR Microcontroller
1
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2
2
1,2
2
1,2
1,2
1,2
2
2
2
2
2
2
2
1,2
2
2
6-15