Z86C72 Datasheet, PDF (24/71 Pages) Zilog, Inc. – IR MICROCONTROLLER

Z86C72/C92/L72/L92
IR Microcontroller
Zilog
PIN FUNCTIONS (Continued)
Port 1 (P17-P10). Port 1 is a multiplexed Address (A7-A0)
and Data (D7-D0), CMOS compatible port. Port 1 is dedi-
cated to the Zilog ZBus^®-compatible memory interface.
The operations of Port 1 are supported by the Address
Strobe (/AS) and Data Strobe (/DS) lines, and by the
Read/Write (R//W) and Data Memory (/DM) control lines.
Data memory read/write operations are done through this
port (Figure 12). If more than 256 external locations are re-
quired, Port 0 outputs the additional lines.
Port 1 can be placed in the high-impedance state along
with Port 0, /AS, /DS, and R//W, allowing the Z86L/CX2 to
share common resources in multiprocessor and DMA ap-
plications. Port1 can also be configured for standard port
output mode.
6-24
8
Z86LXX
MCU
Port 1
(I/O or AD7 - AD0)
Optional
Handshake Controls
/DAV1 and RDY1
(P33 and P34)
OEN
Out
In
PAD
R ≈ 500 KΩ
Figure 12. Port 1 Configuration
Auto Latch
PRELIMINARY
DS97LVO0900