Z5380 Datasheet, PDF (3/37 Pages) Zilog, Inc. – SMALL COMPUTER SYSTEM INTERFACE (SCSI)

ZILOG
D0
1
40
D1
/DB7
2
39
D2
/DB6
3
38
D3
/DB5
4
37
D4
/DB4
5
36
D5
/DB3
6
35
D6
/DB2
7
34
D7
/DB1
8
33
A2
/DB0
9
32
A1
/DBP
10
Z5380 31
VDD
GND
11
30
A0
/SEL
12
29
/IOW
/BSY
13
28
/RESET
/ACK
14
27
/EOP
/ATN
15
26
/DACK
/RST
16
25
READY
I//O
17
24
/IOR
C//D
18
23
IRQ
/MSG
19
22
DRQ
/REQ
20
21
/CS
Figure 3a. 40-Pin DIP Pin Configuration
Z5380 SCSI
/DB3
/DB2
/DB1
/DB0
/DBP
GND
GND
/SEL
/BSY
/ACK
/ATN
6 5 4 3 2 1 44 43 42 41 40
7
39
8
38
9
37
10
36
11
35
Z5380
12
34
13
33
14
32
15
31
16
30
17
29
18 19 20 21 22 23 24 25 26 27 28
D6
D7
A2
A1
VDD
N/C
A0
/IOW
/RESET
/EOP
/DACK
Figure 3b. 44-Pin PLCC Pin Configuration
PIN DESCRIPTION
Microprocessor Bus
Figure 3 shows the pins and their respective functions for
both the DIP and PLCC.
A2-A0 Address Lines (Input). Address lines are used with
/CS, /IOR, or /IOW to address all internal registers.
/CS Chip Select (Input, Active Low). This signal, in con-
junction with /IOR or /IOW, enables the internal register
selected by A2-A0, to be read from or written to.
/DACK DMA Acknowledge (Input, Active Low). /DACK
resets DRQ and selects the data register for input or output
data transfers. /DACK is used by DMA controller instead of
/CS.
DRQ DMA Request (Output, Active High). DRQ indicates
that the data register is ready to be read or written. DRQ is
asserted only if DMA mode is set in the Command Regis-
ter. DRQ is cleared by /DACK.
D7-D0 Data Lines (Bi-directional, three-state, Active High).
Bi-directional microprocessor data bus lines. D0 is the
Least Significant Bit of the bus. Data bus lines carry data
and commands to and from the SCSI.
/EOP End of Process (Input, Active Low). /EOP is used to
terminate a DMA transfer. If asserted during a DMA cycle,
the current byte will be transferred, but no additional bytes
will be requested.
/IOR I/O Read (Input, Active Low). /IOR is used in conjunc-
tion with /CS and A2-A0 to read an internal register. It also
selects the Input Data Register when used with /DACK.
/IOW I/O Write (Input, Active Low). /IOW is used in conjunc-
tion with /CS and A2-A0 to write an internal register. It also
selects the Output Data Register when used with /DACK.
PS97SCC0100
PS009101-0201
3