Z86129 Datasheet, PDF (28/50 Pages) Zilog, Inc. – NTSC LINE 21 DECIDER

Z86129/130/131
NTSC Line 21 Decoder
PRELIMINARY
INTERNAL REGISTERS
Information controlling the setup and operation of the
Z86129/130/131 are maintained in several registers. The
user may read or alter the contents of these registers as
required.
D₁-MONO. Selects monochrome operation. Active High,
indicating that character luminance will be output on all
three color pins (RGB). The default is Low, selecting
COLOR operation.
Serial Status (SS) Register Address = Not Rqd.
Bit D₇
D₆
D₅
D₄
D₃ D₂
D₁
D₀
RDY DAV RD2 WOVR INTR ROVR FLD LOCK
R
RR
RR R RR
Figure 18. Serial Status Register
(Address not required)
D₂-HLK. Selects the horizontal signal source to be used to
lock the VCO: Low = Internal, High = HIN. The default is
Internal.
D₃-VLK. Selects the vertical signal source to be used to
establish vertical sync lock: Low = Internal, High = VIN.
The default is Internal. When Internal lock is enabled the
VIN/INTRO pin will default to the INTRO output mode.
Interrupts should not be selected in the Interrupt Mask
register if VLK mode is used.
D₀-LOCK. Active High, indicating that the internal sync
circuits are locked. May be used as an indication of the
presence of a video signal.
D₄-D₇. Reserved
Display Register Address = 01h
D₁-FLD. Signals the current video field. Low = Field 2,
High = Field 1.
D₂-ROVR. Active High, indicating that the data available in
the output buffer has not been read out and new data has
been written over it.
D₃-INTR. Active High, indicating that an interrupt other
than DAV is pending.
D₄-WOVR. Active High, indicating a serial input data
overrun.
D₅-RD2. Signals the number of bytes available for output.
Low = 1 byte, High = 2 bytes.
D₆-DAV. Active High, indicating that data is available to be
read out.
D₇-RDY. Active High, indicating that the port input buffer is
empty. Only the NOP, RESET and READ instructions may
be sent if RDY is Low.
Configuration Register Address = 00h.
Bit D₇
D₆
D₅
D₄
D₃
D₂
D₁
D₀
res res res res VLK HLK MONO TVS
R/W R/W R/W R/W
Figure 19. Configuration Register (Address = 00h)
D₀-TVS. Selects the television standard. High selects PAL
and Low selects NTSC. The default is NTSC. When PAL
is selected the display defaults to 15 TV scan lines per
display row.
Bit D₇
D₆
D₅
D₄
D₃ D₂
D₁
D₀
O15 ODRP CENH C15 CDRP TENH T15 TDRP
R/W R/W R/W R/W R/W R/W R/W R/W
Figure 20. Display Register (Address = 01h)
D₀-TDRP. Selects Drop Shadow or Full Box in TEXT
mode: High = DROP SHADOW and Low = BOX. The
default is Low.
D₁-T15. Selects the number of TV lines per character row
in a TEXT display: High = 15 lines/row and Low = 13
lines/row. The default is Low.
D₂-TENH. Enables Enhanced Attributes for a TEXT
display: High = Disabled, Low = Enabled. The default is
Low.
D₃-CDRP. Selects Drop Shadow or Full Box in CAPTION
mode: High = DROP SHADOW and Low = BOX. The
default is Low.
D₄-C15. Selects the number of TV lines per character row
in a CAPTION display: High = 15 lines/row and Low = 13
lines/row. The default is Low.
D₅-CENH. Enables Enhanced Attributes for a CAPTION
display: High = Disabled, Low = Enabled. The default is
Low.
Note: OSD and XDS display modes always have
Enhanced Attributes enabled.
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