Z86129 Datasheet, PDF (19/50 Pages) Zilog, Inc. – NTSC LINE 21 DECIDER

PRELIMINARY
Z86129/130/131
NTSC Line 21 Decoder
SERIAL COMMUNICATIONS INTERFACE
Commands and data are sent to and from the Z86129 The Z86129/130/131 can receive or transmit data under
1 ^{through its serial communications interface. Two Serial control of the master device. The Z86129/130/131 is a}
Control Modes are available. One mode is a two wire I²C slave device. Communication is initiated when the master
bus interface. The other serial mode is a three wire, device sends the start condition followed by the
synchronous serial peripheral interface (SPI). In both Z86129/130/131 Slave Address Read byte (29h) or Slave
cases the Z86129/130/131 acts as a slave device.
This port is the path for setting the configuration and
Address Write byte (28h). The Z86129/130/131 will
respond with an Acknowledge. The I²C RD/nWR bit is the
Least Significant Bit (LSB) of the I²C addresses listed
operational modes of the device. It is also the port for _{below in Table 6.}
outputting the recovered XDS data and for inputting the
OSD data for display.
Table 6. Z86129/130/131 I²C Slave Addresses
Five pins are dedicated to the control port function and one
additional pin can be configured to provide an interrupt
output. These pins are designated as shown in Table 5.
Table 5. Z86129/130/131 Serial Control Signals
Signal SMS SCK SDA
SDO
SEN
Pin #
I/O
I2C
SPI
6
15
14
16
4
I
I
I/O
O
I
0 CLK Data
Hi-Z
1
1 CLK Data In Data Out Enable
Notes:
SMS = Serial Mode Select High = SPI & Low = I²C
SCK = Serial port clock for either Serial Mode.
SDA = Serial port data for I²C Mode and Data In for SPI Mode.
SDO = Serial Data Out for SPI Mode. Not used in I²C Mode.
SEN = SPI Mode Enable signal. Must be High for I²C Mode.
I²C Address
READ
29h
WRITE
28h
Note: When the SMS and SEN pins are both Low, the part will
be in the RESET state. Therefore the SEN pin can be used to
reset the part while in the I²C mode. The SEN pin may be tied
to an NRESET signal or tied High if no reset is desired.
The I²C Bus Protocol
1. Data transfer can only be started when the bus is not
busy.
2. During data transfer, data transitions must not occur
while the clock is High.
Bus Conditions are Defined as:
Not Busy: Data and Clock lines both High.
When the Vertical Lock = VIDEO, the VIN/INTRO (pin13)
is configured as an output, providing the INTRO signal.
This interrupt operation is available in either serial control
mode.
The Z86129/130/131 is able to interrupt on the occurrence
of any of several events. The master device will clear the
interrupt by writing to the Interrupt Request Register.
I²C Bus Operation
The serial control mode in use is selected by the state of
the SMS pin. When SMS is set Low, the Z86129/130/131
will be in the I²C mode. In this mode, the Z86129 also
supports a bidirectional two wire bus and data
transmission protocol. The bus is controlled by the master
device, which generates the serial clock (SCK), controls
the bus access and generates the Start and Stop
conditions. The SDA pin is the bidirectional Data line. In
this mode the SDO output is not used and the pin will be in
its high impedance state.
Start: A High to Low transition of SDA line while SCK line
is High.
Stop: A Low to High transition of SDA line while SCK line
is High.
Acknowledge: When addressed, the receiving device
must output an acknowledge after the reception of each
byte. The master device must generate the clock for the
acknowledge bit. Acknowledge is SDA=Low. Not
Acknowledge (NACK) is SDA=High.
Data: The data (SDA) is output by the transmitting device
on the falling edge of SCK, MSB first. The receiving device
will read the data, MSB first, on the rising edge of SCK.
Communication with the Z86129/130/131 is initiated when
the master device sends the Z86129/130/131 slave
address following a start condition. The Z86129/130/131
has a preset, single, seven-bit slave address. The Z86129
will respond with an acknowledge. The eighth bit of the
slave address is driven High for Read operations and Low
for Write operations.
DS96TEL0200
19