Z8PE003 Datasheet, PDF (26/48 Pages) Zilog, Inc. – FEATURE-ENHANCED Z8PLUS 1K ROM ONE-TIME PROGRAMMABLE (OTP) MICROCONTROLLER

Z8PE003
Z8Plus OTP Microcontroller
OSCILLATOR OPERATION (Continued)
Circuit Board Design Rules
The following circuit board design rules are suggested:
• To prevent induced noise, the crystal and load capaci-
tors should be physically located as close to the
Z8Plus as possible.
• Signal lines should not run parallel to the clock oscil-
lator inputs. In particular, the crystal input circuitry
ZiLOG
and the internal system clock output should be separat-
ed as much as possible.
• V_CC power lines should be separated from the clock
oscillator input circuitry.
• Resistivity between XTAL1 or XTAL2 (and the other
pins) should be greater than 10 meg-Ohms.
XTAL1 17
C₁
Z8Plus
XTAL2 16
C₂
V_SS ¹⁵
Clock Generator Circuit
Signals A B
(Parallel traces
must be avoided)
XTAL1 17
Z8Plus
Signal C
Z8Plus
PB0
X1
X2
V_SS
V_CC
Board Design Example
(Top View)
XTAL2 16
Figure 15. Circuit Board Design Rules
Crystals and Resonators
Crystals and ceramic resonators (Figure 16) should exhibit
the following characteristics to ensure proper oscillation:
Crystal Cut
Mode
Crystal Capacitance
Load Capacitance
Resistance
AT (crystal only)
Parallel, fundamental mode
<7pF
10pF < CL < 220 pF,
15 typical
100 Ohms maximum
Depending on the operation frequency, the oscillator may
require additional capacitors, C₁ and C₂, as illustrated in
Figure 16 and Figure 17. The capacitance values are de-
pendent on the manufacturer’s crystal specifications.
26
PRELIMINARY
DS007500-Z8X0399