Z8PE003 Datasheet, PDF (16/48 Pages) Zilog, Inc. – FEATURE-ENHANCED Z8PLUS 1K ROM ONE-TIME PROGRAMMABLE (OTP) MICROCONTROLLER

Z8PE003
Z8Plus OTP Microcontroller
ZiLOG
RESET (Continued)
Table 8. Control and Peripheral Registers* (Continued)
Bits
Register (HEX) Register Name 7 6 5 4 3 2 1 0 Comments
D4
Port B Input
U U U U U U U U Current sample of the input pin
following RESET.
D3
Port A Special 0 0 0 0 0 0 0 0 Deactivates all port special functions
Function
after RESET.
D2
Port A
0 0 0 0 0 0 0 0 Defines all bits as inputs in PortA after
Directional
RESET.
Control
D1
Port A Output U U U U U U U U Output register not affected by RESET
D0
Port A Input
U U U U U U U U Current sample of the input pin
following RESET.
CF
Reserved
CE
Reserved
CD
T1VAL
UUUUUUUU
CC
T0VAL
UUUUUUUU
CB
T3VAL
UUUUUUUU
CA
T2VAL
UUUUUUUU
C9
T3AR
UUUUUUUU
C8
T2AR
UUUUUUUU
C7
T1ARHI
UUUUUUUU
C6
T0ARHI
UUUUUUUU
C5
T1ARLO
UUUUUUUU
C4
T0ARLO
UUUUUUUU
C3
WDTHI
11111111
C2
WDTLO
11111111
C1
TCTLHI
1 1 1 1 1 0 0 0 WDT enabled in HALT mode, WDT
time-out at maximum value, STOP
mode disabled.
C0
TCTLLO
0 0 0 0 0 0 0 0 All standard timers are disabled.
Note: *The SMR and WDT flags are set to indicate the source of the RESET.
Table 9. Flag Register Bit D1, D0
D1
D0
Reset Source
0
0
V_BO/POR
0
1
SMR Recovery
1
0
WDT Reset
1
1
Reserved
16
PRELIMINARY
DS007500-Z8X0399