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Z86E30 Datasheet, PDF (23/66 Pages) Zilog, Inc. – Z8 4K OTP Microcontroller
Zilog
Additional Timing Table
No Symbol Parameter
VCC
Note [6]
TA = -40 °C to +105 °C
16 MHz
Min Max Units
1
TpC
Input Clock Period
3.5V
5.5V
2
TrC,TfC Clock Input Rise &
3.5V
Fall Times
5.5V
3
TwC
Input Clock Width
3.5V
5.5V
4
TwTinL Timer Input Low
Width
3.5V
5.5V
5
TwTinH Timer Input High
3.5V
Width
5.5V
6
TpTin
Timer Input Period 3.5V
5.5V
7
TrTin, TfTin Timer Input Rise
3.5V
& Fall Timer
5.5V
8A TwIL
Int. Request Low
Time
3.5V
5.5V
8B TwIL
Int. Request Low
Time
3.5V
5.5V
9
TwIH
Int. Request Input
3.5V
High Time
5.5V
10
Twsm
STOP Mode
Recovery Width
Spec
3.5V
5.5V
11
Tost
Oscillator Startup
Time
3.5V
5.5V
12
Twdt
Watch-Dog Timer
Delay Time
Before Timeout
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
62.5
DC
ns
62.5
DC
ns
15
ns
15
ns
31
ns
31
ns
70
ns
70
ns
5TpC
5TpC
8TpC
8TpC
100 ns
100 ns
70
ns
70
ns
5TpC
5TpC
5TpC
12
ns
12
ns
5TpC
5TpC
10
ms
5
ms
20
ms
10
ms
40
ms
20
ms
160
ms
80
ms
Notes:
1. Timing Reference uses 0.7 VCC for a logic 1 and 0.2 VCC for a logic 0
2. Interrupt request via Port 3 (P31-P33)
3. Interrupt request via Port 3 (P30)
4. SMR-D5 = 1, POR STOP Mode Delay is on
5. Reg. WDTMR
6. The VCC voltage spec. of 5.5V guarantees 5.0V +/- ± 0.5V
7. SMR D1 = 0
8. Maximum frequency for internal system clock is 4 MHz when using
XTAL divide-by-one mode.
9. For RC and LC oscillator, and for oscillator driven by clock driver.
10. Standard Mode (not Low EMI output ports)
11. Using internal RC
Z86E30/E31/E40
Z8 4K OTP Microcontroller
1
Conditions
D0 = 0
D1 = 0
D0 = 1
D1 = 0
D0 = 0
D1 = 1
D0 = 1
D1 = 1
Notes
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
[1,7,8
1,7,8
1,7,8
1,7,8
1,2,7,8
1,2,7,8
1,3,7,8
1,3,7,8
1,2,7,8
4,8
4,8
4,8
4,8
5,11
5,11
5,11
5,11
5,11
5,11
5,11
5,11
DS97Z8X0500
PRELIMINARY
23