Z86E30 Datasheet, PDF (19/66 Pages) Zilog, Inc. – Z8 4K OTP Microcontroller

Zilog
Z86E30/E31/E40
Z8 4K OTP Microcontroller
No
Symbol
Parameter
T_A = -40°C to 105°C
16 MHz
Note [3]
1
V_CC
Min
Max
Units
Notes
1 TdA(AS)
2 TdAS(A)
3 TdAS(DR)
4 TwAS
Address Valid to /AS Rise
Delay
/AS Rise to Address Float
Delay
/AS Rise to Read Data
Req’d Valid
/AS Low Width
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
25
ns
2
25
ns
35
ns
2
35
ns
180
ns
1,2
180
ns
40
ns
2
40
ns
5 TdAS(DS)
6 TwDSR
7 TwDSW
8 TdDSR(DR)
9 ThDR(DS)
Address Float to /DS Fall
/DS (Read) Low Width
/DS (Write) Low Width
/DS Fall to Read Data Req’d
Valid
Read Data to /DS Rise Hold
Time
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
0
ns
0
ns
135
ns
1,2
135
ns
80
ns
1,2
80
ns
75
ns
1,2
75
ns
0
ns
2
0
ns
10 TdDS(A)
11 TdDS(AS)
/DS Rise to Address Active
Delay
/DS Rise to /AS Fall Delay
12 TdR/W(AS)
13 TdDS(R/W)
R//W Valid to /AS Rise
Delay
/DS Rise to R//W Not Valid
14 TdDW(DSW) Write Data Valid to /DS Fall
(Write) Delay
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
50
ns
2
50
ns
35
ns
2
35
ns
25
ns
2
25
ns
35
ns
2
35
ns
55
25
ns
2
55
25
ns
15 TdDS(DW)
16 TdA(DR)
17 TdAS(DS)
18 TdDM(AS)
20 ThDS(AS)
/DS Rise to Write Data Not
Valid Delay
Address Valid to Read Data
Req’d Valid
/AS Rise to /DS Fall Delay
/DM Valid to /AS Fall Delay
/DS Valid to Address Valid
Hold Time
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
35
ns
2
35
ns
230
ns
1,2
230
ns
45
ns
2
45
ns
30
ns
2
30
ns
35
ns
35
ns
Notes:
1. When using extended memory timing add 2 TpC
2. Timing numbers given are for minimum TpC
3. The V_CC voltage specification of 5.5V guarantees 5.0V +/- 0.5V and
the V_CC voltage specification of 3.5V guarantees 3.5V only
Standard Test Load
All timing references use 0.7 V_CC for a logic 1 and 0.2 V_CC for a logic 0
For Standard Mode (not Low-EMI Mode for outputs) with SMR D1 = 0, D0 = 0
DS97Z8X0500
PRELIMINARY
19