Z86E30 Datasheet, PDF (21/66 Pages) Zilog, Inc. – Z8 4K OTP Microcontroller

Zilog
Additional Timing Table (Divide-By-One Mode)
Z86E30/E31/E40
Z8 4K OTP Microcontroller
T_A = 0 °C to +70 °C T_A = -40 °C to +105 °C
1
4 MHz
4 MHz
No Symbol
Parameter
V_CC
Note [6]
1 TpC
Input Clock Period
2 TrC,TfC Clock Input Rise &
Fall Times
3 TwC
Input Clock Width
4 TwTinL
5 TwTinH
6 TpTin
Timer Input Low
Width
Timer Input High
Width
Timer Input Period
7 TrTin, TfTin Timer Input Rise
& Fall Timer
8A TwIL
Int. Request Low
Time
8B TwIL
Int. Request Low
Time
9 TwIH
Int. Request Input
High Time
10 Twsm
STOP Mode
Recovery Width
Spec
11 Tost
Oscillator Startup
Time
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
Min
250
250
100
100
100
70
5TpC
5TpC
8TpC
8TpC
100
70
5TpC
5TpC
5TpC
5TpC
12
12
Max
DC
DC
25
25
100
100
5TpC
5TpC
Min
250
250
100
100
100
70
5TpC
5TpC
8TpC
8TpC
100
70
5TpC
5TpC
5TpC
5TpC
12
12
Max Units
DC
ns
DC
ns
25
ns
25
ns
ns
ns
ns
ns
100
ns
100
ns
ns
ns
ns
ns
Notes
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,2,7,8
1,2,7,8
1,3,7,8
1,3,7,8
1,2,7,8
1,2,7,8
4,8
4,8
5TpC
4,8,9
Notes:
1. Timing Reference uses 0.7 V_CC for a logic 1 and 0.2 V_CC for a logic 0.
2. Interrupt request via Port 3 (P31-P33).
3. Interrupt request via Port 3 (P30).
4. SMR-D5 = 1, POR STOP Mode Delay is on.
5. Reg. WDTMR.
6. The V_CC voltage specification of 5.5V guarantees 5.0V ±+/- 0.5V and
the V_CC voltage specification of 3.5V guarantees 3.5V only.
7. SMR D1 = 0.
8. Maximum frequency for internal system clock is 4 MHz when
using XTAL divide-by-one mode.
9. For RC and LC oscillator, and for oscillator driven by clock driver.
DS97Z8X0500
PRELIMINARY
21