Z87010 Datasheet, PDF (1/22 Pages) Zilog, Inc. – Audio Encoder/Decoders

PRELIMINARY PRODUCT SPECIFICATION
2
Z87010/Z87L10
2
AUDIO ENCODER/DECODERS
FEATURES
Device
Z87010
ROM
(Kbyte)
4
I/O
Lines
16
Z87L10
4
16
Package
Information
44-Pin PLCC
44-Pin QFP
44-Pin QFP
Hardware
s 16-Bit DSP Processor
s 3.0V to 3.6V; -20° to +70°C, Z87L10
4.5V to 5.5V, -20° to +70°C, Z87010
s Static Architecture
s 512 Word On-Chip RAM
s Modified Harvard Architecture
s Direct Interface to Z87000 Frequency Hopping
Spreader/Despreader
s Direct Interface to 8-Bit µ-law Telephone CODEC
s I/O Bus (16-Bit Tristable Data, 3-Bit Address)
s Wait State Generator
s Two External Interrupts
s Four Separate I/O Pins (2 Input, 2 Output)
Software
s Full Duplex 32 Kbps ADPCM Encoding/Decoding
s Single Tone and DTMF Signal Generation
s Sidetone, Volume Control, Mute Functions
s Large Phone Number Memory (21 numbers of 23 digits
each)
s Master-Slave Protocol Interface to Z87000 Spreader/-
Despreader
GENERAL DESCRIPTION
The Z87010/Z87L10 is a second generation CMOS Digital
Signal Processor (DSP) that has been ROM-coded by
Zilog to provide full-duplex 32 Kbps, Adaptive Delta Pulse
Code Modulation (ADPCM) speech coding/decoding (CO-
DEC), and interface to the Z87000/Z87L00 Spread Spec-
trum Cordless Telephone Controller. Together the
Z87000/Z87L00 and Z87010/Z87L10 devices support the
implementation of a 900 MHz frequency-hopping spread
spectrum cordless telephone in conformance with United
States FCC regulations for unlicensed operation.
The Z87010 and Z87L10 are distinct 5V and 3.3V versions
of the ADPCM Audio Encoder/Decoder. For the sake of
brevity, all subsequent references to the Z87010 in this
document also are applicable to the Z87L10, unless spe-
cifically noted.
The Z87010’s single cycle instruction execution and Har-
vard bus structure promote efficient algorithm execution.
The processor contains a 4K word program ROM and 512
word data RAM. Six dual operand fetching. Three vectored
interrupts are complemented by a six level stack. The CO-
DEC interface enables high-speed transfer rate to accom-
modate digital audio and voice data. A dedicated
Counter/Timer provides the necessary timing signals for
the CODEC interface. An additional 13-bit timer is dedicat-
ed for general-purpose use.
The Z87010’s circuitry is optimized to accommodate intri-
cate signal processing algorithms and is used here for
speech compression/decompression, generation of DTMF
tones and other cordless telephone functions. Dedicated
hardware allows direct interface to a variety of CODEC
DS96WRL0601
PRELIMINARY
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