DS614 Datasheet, PDF (4/9 Pages) Xilinx, Inc – Clock Generator

Clock Generator (v4.03a)
Design Parameters
The parameters defined for the Clock Generator core module are listed and described in Table 1.
Table 1: Clock Generator Parameters
Parameter Name
Feature Description
Allowable Values
Default
C_CLKOUTi_FREQ
Frequency (Hz) of CLKOUTs
natural
C_CLKOUTi_PHASE
Phase of CLKOUTs
Real
C_CLKOUTi_GROUP
Primitive group of CLKOUTs
NONE, MMCM0, MMCM1,
MMCM2, MMCM3, PLL0,
PLL1, DCM0, DCM1, DCM2,
DCM3, PLLE0
C_CLKOUTi_BUF
Insert BUFG for ClKOUTs
TRUE: BUFG is inserted.
FALSE: BUFG is not inserted
C_CLKOUTi_VARIABLE_PH
ASE
Variable Phase of CLKOUTs
TRUE, FALSE
C_CLKOUTi_DUTY_CYCLE
Duty Cycle of CLKOUTs
REAL
C_CLKIN_FREQ
Frequency (Hz) of CLKIN
natural
C_CLKFBIN_FREQ
Frequency (Hz) of CLKFBIN
natural
C_CLKFBIN_DESKEW
Applicable to Virtex-6 and 7 Series
devices only. Set the clock output port to
be used to deskew with CLKFBIN.
NONE — Let the algorithm
select from CLKOUTi; i is 0 to
15. Deskew this clock output
with CLKFBIN.
C_CLKFBOUT_FREQ
This must be equal to
C_CLKBIN_FREQ.
Frequency (HZ) of
CLKFBOUT port.
C_CLKFBOUT_PHASE
This must be 0. Applicable to Virtex-6
and 7 Series devices only.
Phase of CLKFBOUT port.
C_CLKFBOUT_GROUP ⁽¹⁾
Applicable to Virtex-6 and 7 Series
devices only. Group name of
CLKFBOUTi. The MMCM used for clock
deskew is named as this parameter
value.
NONE, MMCM0, MMCM1,
MMCM2, MMCM3
C_CLKFBOUT_BUF
Insert BUFG for CLKFBOUT.
TRUE: BUFG is inserted.
FALSE: BUFG is not inserted.
C_PSDONE_GROUP
Applicable to Virtex-6 and 7 Series
devices only. Group name of PSDONE
to specify the MMDM with variable
phase. ⁽²⁾
NONE, MMCM0,
MMCM0_FB, MMCM1,
MMCM1_FB, MMCM2,
MMCM2_FB, MMCM3,
MMCM3_FB
C_EXT_RESET_HIGH
Reset polarity of RST port.
0: active Low
1: active High
C_CLK_PRIMITIVE_
FEEDBACK_BUF
Applicable to Virtex-6 and 7 Series
devices only. Insert BUFG into the self
feedback path of the clock resource
MMCM.
TRUE: insert BUFG
FALSE: does not insert BUFG
0
0
NONE
TRUE
FALSE
0.5
0
0
NONE
0
0
NONE
TRUE
NONE
1
FALSE
VHDL
Type
integer
Real
string
boolean
boolean
REAL
integer
integer
string
integer
integer
string
boolean
string
integer
boolean
DS614 January 18, 2012
www.xilinx.com
4
Product Specification