DS614 Datasheet, PDF (1/9 Pages) Xilinx, Inc – Clock Generator

Clock Generator (v4.03a)
DS614 January 18, 2012
Product Specification
Introduction
The Clock Generator IP core receives common clock
requirements through its parameters and generates
architecture-specific clocking circuitry, implemented in
a VHDL source. (When the Clock Generator cannot
generate circuitry for a given requirement, it provides
failure analysis.)
The generation algorithm is implemented in C++
programming language and currently it is only
integrated with the Hardware Platform Generator
(PlatGen) and Simulation Generator (SimGen) EDK
implementation tools.
Features
• Receives common clock requirements and generate
architecture-specific clocking circuitry.
• Supports up to 16 different clock requirement.
• Generates synthesizable structural VHDL.
• Indicates generation result through parameter
value, messaging in interactive environment and
log file.
LogiCORE IP Facts Table
Core Specifics
Supported Device
Family ⁽¹⁾
Kintex-7⁽⁵⁾, Artix-7, Virtex-7, Zynq™-7000,
Virtex-6⁽³⁾, Spartan-6⁽⁴⁾, Spartan-3, Virtex-5,
Virtex-4
Resources Used
Min
Max
LUTs
N/A
N/A
FFs
N/A
N/A
Block RAMs
N/A
N/A
DCMs
0
4
PLLs
0
2
PLLEs
0
1
MMCMs
0
4
Provided with Core
Documentation
Product Specification
Design Files
VHDL
Example Design
Not Provided
Test Bench
Not Provided
Constraints File
EDK TCL Generated
Simulation Model
Not Provided
Tested Design Tools ⁽²⁾
Design Entry Tools
ISE^®
Simulation
Mentor Graphics ModelSim
Synthesis Tools
XST
Support
Provided by Xilinx, Inc.
Notes:
1. For a complete listing of supported devices, see the release
notes for this core.
2. For a listing of the supported tool versions, see the ISE Design
Suite 13.4: Release Note Guide.
3. For more information, see the DS150 Virtex-6 Family
Overview Product Specification.
4. For more information, see DS160 Spartan-6 Family Overview
Product Specification.
5. For more information, see DS180 7 Series FPGAs Overview.
© Copyright 2007-2012 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, Artix, Kintex, Zynq, ISE and other designated brands included herein are trademarks of
Xilinx in the United States and other countries. The PowerPC name and logo are registered trademarks of IBM Corp. and are used under license. All other trademarks
are the property of their respective owners.
DS614 January 18, 2012
www.xilinx.com
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Product Specification