DS604 Datasheet, PDF (11/12 Pages) –

3GPP2 Turbo Encoder v2.0
Performance and Resource Usage
Table 3: Performance and Resource Usage
Option Pins
Resource
Notes
Virtex-4
XC4VSX55-10
Area (slices)
1,2
253
Block Memories (18K)
2
None
MULT18x18s or DSP48s
4
D _{Speed (MHz)}
1,3
368
Area (slices)
1,2
288
i_All
Block Memories (18K)
2
s(CE, SCLR, ACLR, RFD_IN, ND) _{MULT18x18s or DSP48s}
4
Speed (MHz)
1,3
322
c _{Area (slices)}
1,2
269
o ^{Block Memories (18K)}
2
RFD_IN
MULT18x18s or DSP48s
4
nSpeed (MHz)
1,3
350
Area (slices)
1,2
254
t_{Block Memories (18K)}
2
ND
i_{MULT18x18s or DSP48s}
4
n_{Speed (MHz)}
1,3
366
Notes:
u 1. Area and maximum clock frequencies are provided as a guide. They may vary with new releases of Xilinx implementation
tools, etc.
2. Area figures obtained with the core instantiated within a single registered wrapper, with the wrapper registers in the IOBs.
3. Speed figures obtained with the core instantiated within a double registered wrapper, with the outer wrapper registers in the
e _{IOBs. Clock frequency does not take clock jitter into account and should be derated by an amount appropriate to the clock}
source jitter specification.
d _{Evaluation License}
Xilinx provides a full system hardware evaluation of the IP core. After filling out the evaluation request
form, you will be able to download the evaluation core. You will be able to parameterize, generate and
I ^{instantiate this IP in your design. You will be able to perform functional and timing simulation and}
P ^{download and configure your design in hardware. The evaluation license allows for a bitstream to be}
generated. The resulting IP will be fully functional for 2-3 hours. After that, the IP times out and you
will need to download and reconfigure the FPGA.
References
1. CDMA2000 High Rate Packet Data Air Interface Specification 3GPP2 C.S0024-B Version 1.0, May 2006
2. Near Shannon Limit Error-correcting Coding and Decoding Turbo Codes, C. Berrou, A. Glavieux, and P.
Thitimajshima, IEEE Proc 1993 International Conference Committee, pp1064-1070.
DS604 April 2, 2007
www.xilinx.com
11
Product Specification