X9470 Datasheet, PDF (9/25 Pages) Xicor Inc. – RF Power Amplifier (PA) Bias Controller

Preliminary Information
X9470
Write Cycle Timing
SCL
SDA
8th Bit of Last Byte
ACK
t_WC
Stop
Condition
Start
Condition
Power Up Timing
Symbol
t_r V_CC⁽¹⁰⁾
Parameter
V_CC Power-up rate
Min.
0.2
Max.
50
Unit
V/ms
Note:
Delays are measured from the time V_CC is stable until the specified operation can be initiated. These parameters are not 100% tested.
Proper recall of stored wiper setting requires a V_CC power-up ramp that is monotonic and with noise or glitches < 100mV. It is important
to correctly sequence voltages in an LDMOS amplifier circuit. For the X9470 typical application, the V_CC, then V+ pins should be pow-
ered before the V_DD of the LDMOS to prevent LDMOS damage. Under no circumstances should the V_DD be applied to the LDMOS
device before V_CC and V+ are applied to the X9470.
DCP Default Power-up Tap Positions (shipped from factory)
VREF DCP
0
Bias Adjust DCP
0
Nonvolatile Write Cycle Timing
Symbol
t_WC⁽¹⁰⁾
Parameter
Write Cycle Time
Min.
Typ.⁽¹⁾
5
Max.
10
Unit
ms
Note: t_WC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
REV 11.16 3/20/03
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