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X9470 Datasheet, PDF (12/25 Pages) Xicor Inc. – RF Power Amplifier (PA) Bias Controller
Preliminary Information
X9470
Figure 1. Typical Application
INC/DEC
RWREF RHREF RLREF AGND VOUT V+
A2
RREF
A1
VREF
Comparator
A0
VP
Instrumentation
Amplifier
VDD
VSENSE+
CBULK
∆V VSENSE– RSENSE
SDA
SCL
I2C
interface
Control &
Status Registers
EEPROM
Vbias
control
VREF
control
RBIAS
+
–
choke
VBIAS
FILTER
RF
out
RF PA in
Matching
RF Impedance
VCC VSS
CS RHBIAS RWBIAS RLBIAS SHDN
Class A Example
X9470 FUNCTIONAL DESCRIPTION
This section provides detail description of the following:
– Sense and Scale Block Description
– Bias Adjustment Control Block Description
– Output Block Description
– Bias Adjustment and Storage Description
SENSE AND SCALE BLOCK
The Sense and Scale Circuit Block (Figure 2) implements
an instrumentation amplifier whose inputs (VSENSE+ and
VSENSE-) are across an external sense resistor in the
drain circuit of an RF Power FET. VSENSE+ is connected
to VDD, the drain voltage source for the RF power FET,
and VSENSE- pin is connected to the other end the exter-
nal sense resistor.
An internal instrumentation amplifier (IA) will sense the
∆V and amplify it by a gain factor of K1 (see Equation
1). The resulting output is compared with VREF at the
comparator. VREF can be a fixed reference voltage or
adjusted by using the 64-tap digital potentiometer. The
output of the comparator is used to increment or decre-
ment the RBIAS potentiometer in the Bias Adjustment
Circuit Block. The gain factor K1 is designed such that
the Sense and Scale Block will set the Bias Adjustment
Circuit Block to operate in a given voltage range (mV)
vs. drain current adjustment (mA).
IDQ Х
VREF
K1 * RSENSE
(1)
K1 is fixed 50x for the internal comparator input.
The output of the IA is also available at the pin Vout to
enable drain current monitoring. The gain at Vout is
fixed at a factor of K2, lower than K1 so that high IDQ
currents will not cause saturation of the Vout signal.
The equation for Vout is given as:
∆V = IDQ * RSENSE
VOUT = K2 * ∆V
K2 is fixed to 20x for the Vout pin
BIAS ADJUSTMENT CIRCUIT BLOCK
There are three sections of this block (Figure 3): the
input control, counter and decode section (1), the
resistor array (2); and the non-volatile register (3). The
input control section operates just like an up/down
counter. The input of the counter is driven from the out-
put of the comparator in the Sense and Scale Block
and is clocked by the SCL signal. The output of this
counter is decoded to select one of the taps of a 256-
tap digital potentiometer.
REV 11.16 3/20/03
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