X9470 Datasheet, PDF (2/25 Pages) Xicor Inc. – RF Power Amplifier (PA) Bias Controller

Preliminary Information
X9470
PIN CONFIGURATION
V_sense+
RH_REF
RL_REF
RW_REF
AGND
VSS
CS
SCL
SDA
RH_BIAS
RW_BIAS
RL_BIAS
TSSOP
1
24
2
23
3
22
4
21
5 _X9470 ²⁰
6
19
7
18
8
17
9
16
10
15
11
14
12
13
V_sense-
SHDN
INC/DEC
V_OUT
V+
V_CC
V_CC
V_BIAS
VSS
A2
A1
A0
ORDERING INFORMATION
Part Number
X9470V24I
Temperature Range
-40°C TO 85°C
Package
24-Lead TSSOP
PIN DESCRIPTIONS
TSSOP pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
V_SENSE+
RH _REF
RL _REF
RW _REF
AGND
VSS
CS
SCL
SDA
RH _BIAS
RW _BIAS
RL _BIAS
A0
A1
A2
VSS
V _BIAS
V _CC
V _CC
V+
V _OUT
INC/DEC
SHDN
V _SENSE-
Brief Description
Positive sense voltage input terminal
Upper Terminal of Potentiometer, called the R_REF potentiometer. The voltage applied to this pin will determine the
upper voltage limit of the adjustment for the Up/Down threshold of the comparator.
Lower Terminal of Potentiometer, called the R_REF potentiometer. The voltage applied to this pin will determine the
lower voltage limit of the adjustment for the Up/Down threshold of the comparator.
Wiper Terminal of Potentiometer, called the R_REF potentiometer. The voltage on this pin will be the threshold for
the Up/Down comparator. Also referred to as the V_REF of the comparator.
Analog ground to allow single point grounding external to the package to minimize digital noise.
System (Digital) Ground Reference
Chip Select. This input enables bias calibration adjustments to the R_BIAS potentiometer. CMOS input with internal
pull-down.
Dual function. Function 1: The increment control input. Increments or decrements the R_BIAS potentiometer.
Function 2: Serial Data Clock Input. Requires external pull-up.
Serial Data Input. Bi-directional 2-wire interface. Requires external pull-up.
Upper Terminal of Potentiometer, called the R_BIAS potentiometer. The voltage applied to this pin will determine the
upper limit of the bias voltage to the PA (or V_BIAS pin).
Wiper Terminal of Potentiometer, called the R_BIAS potentiometer. This voltage is the equivalent to the unbuffered
voltage that will appear at the V_BIAS pin.
Lower Terminal of Potentiometer, called the R_BIAS potentiometer. The voltage applied to this pin will determine the
lower limit of the bias voltage to the PA (or V_BIAS pin).
External address pin which allows for a hardware slave address selection of this device.
This pin has an internal pull-down.
External address pin which allows for a hardware slave address selection of this device.
This pin has an internal pull-down.
External address pin which allows for a hardware slave address selection of this device.
This pin has an internal pull-down.
System (Digital) Ground Reference
This is the bias output voltage pin and is used to drive the filter network to the PA gate.
System (Digital) Supply Voltage
System (Digital) Supply Voltage
Positive voltage supply for the instrumentation amplifier and other analog circuits.
Instrumentation Amplifier output that is 20x or 50x the voltage across the Rsense pins.
Status output that indicates the state of the comparator. When this pin is HIGH, the RBIAS potentiometer will in-
crement; when the pin is LOW, the RBIAS potentiometer will decrement. This pin is open drain and requires ex-
ternal resistor pull-up.
Shutdown the output op amp. When SHDN is active (HIGH), the V_BIAS pin is pulled LOW.
Negative sense voltage Input terminal
REV 11.16 3/20/03
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