X9470 Datasheet, PDF (20/25 Pages) Xicor Inc. – RF Power Amplifier (PA) Bias Controller

Preliminary Information
X9470
X9470 BUS INTERFACE INFORMATION
Figure 7. Slave Address, Word Address, and Data Bytes - Write Mode
Device Identifier
Slave Address
Slave Address Byte
0
1
0
1
S2 S1
S0 R/W=0 _{Byte 0}
Byte Address
A7
A6
A5
A4
A3
A2
A1
A0 _{Byte 1}
Data Byte
D7
D6
D5
D4
D3
D2
D1
D0
Byte 2
0Fh : SR
00h : V_BIAS
01h : V_REF
Figure 8. Slave Address, Word Address, and Data Bytes - Read Mode
Device Identifier
Slave Address
Slave Address Byte
0
1
0
1
S2 S1
S0
R/W _{Byte 0}
Data Byte
D7
D6
D5
D4
D3
D2
D1
D0 _{Byte 1}
Data Byte
D7
D6
D5
D4
D3
D2
D1
D0
Byte 2
Slave Address, Byte Address, and Data Byte
The byte communication format for the serial bus is
shown in Figures 7 and 8 above. The first byte, BYTE
0, defines the device indentifier, 0101 in the upper half;
and the device slave address in the low half of the byte.
The slave address is determined by the logic values of
the A0, A1, and A2 pins of the X9470. This allows for
up to 8 unique addresses for the X9470. The next byte,
BYTE 1, is the Byte Address. The Byte Address identi-
fies a unique address for the Status or Control Regis-
ters as shown in Table 3. The following byte, Byte 2, is
the data byte that is used for READ and WRITE opera-
tions.
Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The device continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met. See
Figure 9.
REV 11.16 3/20/03
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