X9470 Datasheet, PDF (11/25 Pages) Xicor Inc. – RF Power Amplifier (PA) Bias Controller

Preliminary Information
X9470
V_OUT
This pin is the output of the IA, which reflects a 20x or
50x gain of the input signal (voltage across the Vsense
pins). It can be used to indicate the magnitude of the
drain current envelope when RF is present.
Output Block Pins
V_BIAS
The V_BIAS is the gate bias voltage output. It is buffered
with a unity gain amplifier and is capable of driving 1nF
(typical) capacitive loads.
This pin is intended to be connected through an RF fil-
ter to the gate of an LDMOS power transistor. The volt-
age of V_BIAS is determined by the XDCP’s value of the
R_BIAS resistor.
Other Pins
SHDN
SHDN is an input pin that is used to shutdown the
V_BIAS output voltage follower. When the SHDN pin is
HIGH, the V_BIAS pin is pulled to VSS. When the device
is shutdown, the current R_BIAS wiper position will be
maintained in the wiper counter register. When shut-
down is disabled, the wiper returns to the same wiper
position before shutdown was invoked. Note that when
the device is taken out of shutdown mode (SHDN goes
from HIGH to LOW), the CS input must be cycled once
to enable calibration.
SDA
Serial bus data input/output. Bi-directional. External
pullup is required.
A0, A1, A2
Serial bus slave address pins. These pins are used to
defined a hardware slave address. This will allow up to
8 of the X9470’s to be shared on one two-wire bus.
These are useful if several X9470’s are used to control
the bias voltages of several LDMOS Power Transistors
in a single application. Default hardware slave address
is “000” if left unconnected due to internal pull-down
resistor.
TYPICAL APPLICATION
The X9470 can be used along with a microprocessor
and transmit control chips to control and coordinate
FET biasing (see Figure 1). The CS, SCL, and SDA
signals are required to control the X9470 Bias Adjust-
ment Circuit Block. An internal R_WREF voltage is pro-
vided via a programmable voltage divider between the
RH_REF and RL_REF pins and is used to set the voltage
reference of the comparator. The shutdown (SHDN)
and bias voltage indicators (INC/DEC) are additional
functions that offer FET control, monitoring, and pro-
tection.
Typically, the closed loop setup of the X9470 allows for
final calibration of a power amplifier at production test.
The CS and SCL pins are used to perform this calibra-
tion function. Once in a base station, the amplifier can
then be re-calibrated any time that there is no RF sig-
nal present. The bias setting block can also be used
open loop to adjust gate bias or can be shutdown
using the SHDN pin. The sense and scale block can be
used for amplifier power monitoring diagnostics as
well.
The range of the drain bias current operating point of
the LDMOS FET is set by an external reference across
the reference potentiometer. The wiper of the potenti-
ometer sets the trip point for comparison with V_P, the
amplified voltage across R_SENSE, the drain resistor.
The output of the comparator causes the R_BIAS poten-
tiometer to increment or decrement automatically on
the next SCL clock cycle. This R_BIAS potentiometer is
configured as a voltage divider with a buffered wiper
output which drives the gate voltage of an external
LDMOS FET.
Once the optimum bias point is reached, the R_BIAS
value is latched into a wiper counter register. Again,
the V_BIAS gate voltage can be updated continuously or
periodically depending on the system requirements.
Both terminals of the R_BIAS potentiometer are access-
ible and can be driven by external reference voltages
to achieve a desired I_DQ vs. gate voltage resolution, as
well as supporting temperature compensation circuitry.
In summary, the X9470 provides full flexibility on set-
ting the operating bias point and range of an external
RF power amplifier for GSM, EDGE, UMTS, CDMA or
other similar applications.
REV 11.16 3/20/03
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