X5114 Datasheet, PDF (20/40 Pages) Xicor Inc. – System Controller

X5114
Figure 15. Output Mode - SPI Write
CSa/CSb
SCKa/SCKb
SIa/SIb
SOa/SOb
Device Address
WDVRA Instruction
D D D DD D D DO OO OO O O O
AA AAA A A A P PP PP P P P
76 543 2 1 07 65 43 2 1 0
PORT A Data
DDDDDDD D
7654321 0
Status Register Data
SSSSSSS S
7654321 0
interlocked mode
RDRF (PB5 out)
pulsed mode
IRQA
XRE (Flag)
Figure 16. Output Mode - Parallel Read
STRA (PB7 in)
Port A Data (Normal)
Port A Data (Tristate)
XRE (Flag)
interlocked mode
RDRF (PB5 out)
pulsed mode
IRQA
Static Valid Port Data
Valid Port Data
generates STRB. This mode gives the X5114 the
capability of performing multiple data reads while the
SPI select line, CSa or CSb remains asserted and
SCK clocks data through the SPI port.
Output Mode
EXAMPLE APPLICATION:
The host processor initiates a data byte transfer through
the SPI and Port A to a slave processor. The slave then
executes the command. This mechanism allows
numerous remote processors to reside on the same SPI
three wire bus to reduce interface complexity. In this
case, the remote processor does not need an SPI port,
but communicates via a parallel I/O.
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