W9412G6JH Datasheet, PDF (9/53 Pages) Winbond – 2M  4 BANKS  16 BITS DDR SDRAM

W9412G6JH
7. FUNCTIONAL DESCRIPTION
7.1 Power Up Sequence
(1) Apply power and attempt to CKE at a low state (  0.2V), all other inputs may be undefined
1) Apply VDD before or at the same time as VDDQ.
2) Apply VDDQ before or at the same time as VTT and VREF.
(2) Start Clock and maintain stable condition for 200 µS (min.).
(3) After stable power and clock, apply NOP and take CKE high.
(4) Issue precharge command for all banks of the device.
(5) Issue EMRS (Extended Mode Register Set) to enable DLL and establish Output Driver Type.
(6) Issue MRS (Mode Register Set) to reset DLL and set device to idle with bit A8.
(An additional 200 cycles(min) of clock are required for DLL Lock before any executable
command applied.)
(7) Issue precharge command for all banks of the device.
(8) Issue two or more Auto Refresh commands.
(9) Issue MRS-Initialize device operation with the reset DLL bit deactivated A8 to low.
CLK
CLK
Command
PREA
EMRS
MRS
PREA
tRP
2 Clock min.
2 Clock min.
Inputs
maintain stable
for 200 µS min.
Enable DLL
DLL reset with A8 = High
AREF
AREF
tRP
tRFC
200 Clock min.
tRFC
MRS
ANY
CMD
2 Clock min.
Disable DLL reset with A8 = Low
Initialization sequence after power-up
Publication Release Date: Nov. 29, 2011
-9-
Revision A03