W9412G6JH Datasheet, PDF (35/53 Pages) Winbond – 2M  4 BANKS  16 BITS DDR SDRAM

W9412G6JH
11. TIMING WAVEFORMS
11.1 Command Input Timing
tCK
CLK
CLK
CS
tCK
tIS
tIH
tCH
tCL
RAS
CAS
WE
A0~A11
BA0,1
tIS
tIH
tIS
tIH
tIS
tIH
tIS
tIH
Refer to the Command Truth Table
11.2 Timing of the CLK Signals
tCH
CLK
CLK
CLK
CLK
VX
tCL
tT
tCK
VX
tT
VX
VIH
VIH(AC)
VIL(AC)
VIL
VIH
VIL
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Publication Release Date: Nov. 29, 2011
Revision A03