W9412G6JH Datasheet, PDF (26/53 Pages) Winbond – 2M  4 BANKS  16 BITS DDR SDRAM

W9412G6JH
9.6 AC Characteristics and Operating Condition
SYM.
PARAMETER
-4
-5/-5I/-5K
-6I
UNIT NOTES
MIN. MAX. MIN. MAX. MIN. MAX.
tRC Active to Ref/Active Command Period
48
50
54
tRFC Ref to Ref/Active Command Period
60
70
70
tRAS Active to Precharge Command Period
40 70000 40 70000 42 100000 nS
tRCD Active to Read/Write Command Delay Time
16
15
18
tRAP Active to Read with Auto-precharge Enable
16
15
18
tCCD
Read/Write(a) to Read/Write(b) Command
Period
1
1
1
tCK
tRP Precharge to Active Command Period
16
15
18
tRRD Active(a) to Active(b) Command Period
12
10
12
nS
tWR Write Recovery Time
12
15
15
tDAL
Auto-precharge
Time
Write
Recovery
+
Precharge
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
tCK
18
CL = 2
-
-
7.5 12 7.5
12
tCK CLK Cycle Time
CL = 2.5
CL = 3
-
-
6
12
6
12
4
12
5
12
6
12
CL = 4
tAC _{Data Access Time from CLK, CLK}
tDQSCK _{DQS Output Access Time from CLK, CLK}
4
12
-
-
-
-
nS
-0.65 0.65 -0.7 0.7 -0.7 0.7
16
-0.55 0.55 -0.6 0.6 -0.6 0.6
tDQSQ Data Strobe Edge to Output Data Edge Skew
0.4
0.4
0.4
tCH CLk High Level Width
tCL CLK Low Level Width
0.45 0.55 0.45 0.55 0.45 0.55
tCK
11
0.45 0.55 0.45 0.55 0.45 0.55
min
min,
min,
tHP CLK Half Period (minimum of actual tCH, tCL)
(tCL,tCH)
(tCL,tCH)
(tCL,tCH)
nS
tQH DQ Output Data Hold Time from DQS
tHP-0.5
tHP-0.5
tHP-0.5
tRPRE DQS Read Preamble Time
tRPST DQS Read Postamble Time
0.9 1.1 0.9 1.1 0.9
1.1
tCK
11
0.4 0.6 0.4 0.6 0.4
0.6
tDS DQ and DM Setup Time
0.4
0.4
0.4
tDH DQ and DM Hold Time
0.4
0.4
0.4
nS
tDIPW DQ and DM Input Pulse Width (for each input) 1.75
1.75
1.75
tDQSH DQS Input High Pulse Width
0.35
0.35
0.35
tDQSL DQS Input Low Pulse Width
tDSS DQS Falling Edge to CLK Setup Time
0.35
0.35
0.35
0.2
0.2
0.2
tCK
11
tDSH DQS Falling Edge Hold Time from CLK
0.2
0.2
0.2
tWPRES Clock to DQS Write Preamble Set-up Time
0
0
0
nS
- 26 -
Publication Release Date: Nov. 29, 2011
Revision A03