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W9412G6JH Datasheet, PDF (25/53 Pages) Winbond – 2M  4 BANKS  16 BITS DDR SDRAM
W9412G6JH
9.5 DC Characteristics
SYM.
PARAMETER
-4
Operating current: One Bank Active-Precharge;
tRC = tRC min; tCK = tCK min;
IDD0 DQ, DM and DQS inputs changing once per clock cycle;
60
Address and control inputs changing once every two clock cycles.
Operating current: One Bank Active-Read-Precharge;
IDD1 Burst = 4; tRC = tRC min; CL = 3; tCK = tCK min; IOUT = 0 mA;
75
Address and control inputs changing once per clock cycle.
Precharge Power Down standby current:
IDD2P All Banks Idle; Power down mode;
5
CKE < VIL max; tCK = tCK min; Vin = VREF for DQ, DQS and DM.
Idle standby current:
IDD2N CS > VIH min; All Banks Idle; CKE > VIH min; tCK = tCK min;
25
Address and other control inputs changing once per clock cycle;
Vin > VIH min or Vin < VIL max for DQ, DQS and DM.
Active Power Down standby current:
One Bank Active; Power down mode;
IDD3P CKE < VIL max; tCK = tCK min;
15
Vin = VREF for DQ, DQS and DM.
Active standby current:
CS > VIH min; CKE > VIH min; One Bank Active-Precharge;
IDD3N tRC = tRAS max; tCK = tCK min;
35
DQ, DM and DQS inputs changing twice per clock cycle;
Address and other control inputs changing once per clock cycle.
Operating current:
Burst = 2; Reads; Continuous burst; One Bank Active;
IDD4R Address and control inputs changing once per clock cycle;
140
CL=2; tCK = tCK min; IOUT = 0mA.
Operating current:
Burst = 2; Write; Continuous burst; One Bank Active;
IDD4W Address and control inputs changing once per clock cycle;
135
CL = 2; tCK = tCK min;
DQ, DM and DQS inputs changing twice per clock cycle.
IDD5 Auto Refresh current: tRC = tRFC min.
75
IDD6
Self Refresh current: CKE < 0.2V; external clock on; tCK = tCK
min.
2
Random Read current: 4 Banks Active Read with activate every
20nS, Auto-Precharge Read every 20 nS;
IDD7 Burst = 4; tRCD = 3; IOUT = 0mA;
170
DQ, DM and DQS inputs changing twice per clock cycle;
Address changing once per clock cycle.
MAX.
-5/-5I/-5K
55
65
5
20
10
30
120
115
70
2
150
UNIT NOTES
-6I
50
7
55
7, 9
5
20
7
10
mA
30
7
110
7, 9
100
7
65
7
2
130
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Publication Release Date: Nov. 29, 2011
Revision A03