ISD5116 Datasheet, PDF (9/57 Pages) Winbond – Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability

2.3 PINOUT TABLE
Pin Name
RAC
INT
XCLK
SCL
SDA
A0
Pin No.
28-pin
TSOP
3
4
5
8
10
11
Pin No.
28-pin
SOIC
24
25
26
1
3
4
Functionality
Row Address Clock; an open drain output. The RAC pin goes LOW
T_RACLO1 before the end of each row of memory and returns HIGH at
exactly the end of each row of memory.
Interrupt Output; an open drain output that indicates that a set EOM bit
has been found during Playback or that the chip is in an Overflow (OVF)
condition. This pin remains LOW until a Read Status command is
executed.
This pin allows the internal clock of the device to be driven externally for
enhanced timing precision. This pin is grounded for most applications.
Serial Clock Line is part of the I²C interface. It is used to clock the data
into and out of the I²C interface.
Serial Data Line is part of the I²C interface. Data is passed between
devices on the bus over this line.
Input pin that supplies the LSB for the I²C Slave Address.
A1
9
2
Input pin that supplies the LSB +1 bit for the I²C Slave Address.
MIC+
16
8
Differential Positive Input to the microphone amplifier.
MIC-
17
10
Differential Negative Input to the microphone amplifier.
ANA OUT+
18
11
Differential Positive Analog Output for ANA OUT of the device.
ANA OUT-
19
12
Differential Negative Analog Output for ANA OUT of the device.
ACAP
20
13
AGC Capacitor connection. Required for the on-chip AGC amplifier.
SP+
SP-
ANA IN
AUX IN
AUX OUT
VCCD
VSSD
VSSA
VCCA
NC
23
21
25
26
27
6,7
12,13
2,15,22
24
1,14,28
16
14
18
19
20
27,28
5,6
9,15,23
17
7,21,22
Differential Positive Speaker Driver Output.
Differential Negative Speaker Driver Output. When the speaker outputs
are in use, the AUX OUT output is disabled.
Analog Input. This is one of the gain adjustable analog inputs of the
device.
Auxiliary Input. This is one of the gain adjustable analog inputs of the
device.
Auxiliary Output. This is one the analog outputs of the device. When this
output is in use, the SP+ and SP- outputs are disabled.
Positive Digital Supply pins. These pins carry noise generated by
internal clocks in the chip. They must be carefully bypassed to Digital
Ground to insure correct device operation.
Digital Ground pins.
Analog Ground pins.
Positive Analog Supply pin. This pin supplies the low level audio
sections of the device. It should be carefully bypassed to Analog Ground
to insure correct device operation.
No Connect.
1 _{See the Parameters section of on page 38.}
October 2000
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