ISD5116 Datasheet, PDF (14/57 Pages) Winbond – Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability

3.4 DATA BYTES
In the I²C write mode, the device can accept data sent after the command byte. If a register load option is
selected, the next two bytes are loaded into the selected register. The format of the data is MSB first, the
I²C standard. Thus to load DATA<15:0> into the device, DATA<15:8> is sent first, the byte is
acknowledged, and DATA<7:0> is sent next. The address register consists of two bytes. The format of
the address is as follows:
ADDRESS<15:0> = PAGE_ADDRESS<10:0>, BLOCK_ADDRESS<4:0>
Note: if an analog function is selected, the block address bits must be set to 0000. Digital Read
and Write are block addressable.
When the device is polled with the Read Status command, it will return three bytes of data. The first byte
is the status byte, the next the upper address byte and the last the lower address byte. The status register
is one byte long and its bit function is:
STATUS<7:0> = EOM, OVF, READY, PD, PRB, DEVICE_ID<2:0>
Lower address byte will always return the block address bits as zero, either in digital or analog mode.
The functions of the bits are:
EOM
OVF
READY
PD
PRB
DEVICE_ID
Indicates whether an EOM interrupt has occurred.
Indicates whether an overflow interrupt has occurred.
Indicates the internal status of the device – if READY is LOW no new commands
should be sent to device.
Device is powered down if PD is HIGH.
Play/Record mode indicator. HIGH=Play/LOW=Record.
An internal device ID. This is 001 for the ISD5116.
It is recommended that you read the status register after a Write or Record operation to ensure that the
device is ready to accept new commands. Depending upon the design and the number of pins available
on the controller, the polling overhead can be reduced. If INT and RAC are tied to the microcontroller, it
does not have to poll as frequently to determine the status of the ISD5116.
3.5 CONFIGURATION REGISTER BYTES
The configuration register bytes are defined, in detail, in the drawings of Section 4 on page 21. The
drawings display how each bit enables or disables a function of the audio paths in the ISD5116. The
tables below give a general illustration of the bits. There are two configuration registers, CFG0 and CFG1,
so there are four 8-bit bytes to be loaded during the set-up of the device.
October 2000
Page 13