W77IE58 Datasheet, PDF (78/90 Pages) Winbond – 8-BIT MICROCONTROLLER

Preliminary W77IE58
5. The erase verify operation follows behind the erase operation.
+5V
A0-A7
VIL
VIL
VIL
VIL
VIL
VIH
P1
P3.0
P3.1
P3.2
P3.3
P3.6
P3.7
X'tal1
X'tal2
Vss
Vcc
P0
EA/Vpp
ALE
RST
PSEN
P2
PGM DATA
VC P
VIL
VIH
VIH
A8-A15
A0-A7
VIL
VIL
VIL
VIL
VIH
VIL
+5V
P1
P3.0
P3.1
P3.2
P3.3
P3.6
P3.7
X'tal1
X'tal2
Vss
Vcc
P0
EA/Vpp
ALE
RST
PSEN
P2
PGM DATA
VC P
VIL
VIH
VIH
A8-A15
Programming Configuration
Programming Verification
SECURITY BITS
During the on-chip FLASH ROM operation mode, the FLASH ROM can be programmed and verified
repeatedly. Until the code inside the FLASH ROM is confirmed OK, the code can be protected. The
protection of Flash ROM and those operations on it are described below.
The W77IE58 has several Special Setting Registers, including the Security Register and
Company/Device ID Registers, which can not be accessed in normal mode. These registers can only be
accessed from the FLASH ROM operation mode. Those bits of the Security Registers can not be
changed once they have been programmed from high to low. They can only be reset through erase-all
operation. The contents of the Company ID and Device ID registers have been set in factory. Both
registers are addressed by the A0 address line during the same specific condition.
The Security Register is addressed in the FLASH-ROM operation mode by address #0FFFFh.
D7 D6 D5 D4 D3 D2 D1 D0
1101101 0
Company ID (#DAH)
0110001 0
Device ID (#62H)
Reserved B3 ^{B2 B1 B0}
Security Bits
B0: Lock bit, logic 0: active
B1: MOVC inhibit,
logic 0: the MOVC instruction in external memory
cannot access the code in internal memory.
logic1 : no restriction.
B2: Seed 0 & 1 access inhibit
B3: This bit must be H.
0000h
On-Chip
32³K^2KB^{B F}M^LAT^SP^{H R}R^OO^M M
Program Memory
Reserved
7FFFh
Seed 1
0FF3Fh
Seed 0
0FF7Fh
Security Register 0FFFFh
Default 1 for each bit.
Special Setting Registers
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