W77IE58 Datasheet, PDF (53/90 Pages) Winbond – 8-BIT MICROCONTROLLER

Preliminary W77IE58
Watchdog Timer Reset
The Watchdog timer is a free running timer with programmable time-out intervals. The user can clear the
watchdog timer at any time, causing it to restart the count. When the time-out interval is reached an
interrupt flag is set. If the Watchdog reset is enabled and the watchdog timer is not cleared, then 512
clocks from the flag being set, the watchdog timer will generate a reset . This places the device into the
reset condition. The reset condition is maintained by hardware for two machine cycles. Once the reset is
removed the device will begin execution from 0000h.
Reset State
Most of the SFRs and registers on the device will go to the same condition in the reset state. The
Program Counter is forced to 0000h and is held there as long as the reset condition is applied. However,
the reset state does not affect the on-chip RAM. The data in the RAM will be preserved during the reset.
However, the stack pointer is reset to 07h, and therefore the stack contents will be lost. The RAM
contents will be lost if the V_DD falls below approximately 2V, as this is the minimum voltage level required
for the RAM to operate normally. Therefore after a first time power on reset the RAM contents will be
indeterminate. During a power fail condition, if the power falls below 2V, the RAM contents are lost.
After a reset most SFRs are cleared. Interrupts and Timers are disabled. The Watchdog timer is disabled
if the reset source was a POR. The port SFRs have FFh written into them which puts the port pins in a
high state. Port 0 floats as it does not have on-chip pull-ups.
Table 6. SFR Reset Value
SFR Name
P0
Reset Value
11111111b
SP
00000111b
DPL
DPH
00000000b
00000000b
DPL1
00000000b
DPH1
DPS
00000000b
00000000b
PCON
00xx0000b
TCON
TMOD
00000000b
00000000b
TL0
00000000b
TL1
00000000b
TH0
00000000b
TH1
00000000b
CKCON
P1
00000001b
11111111b
SFR Name
IE
SADDR
P3
IP
SADEN
T2CON
T2MOD
RCAP2L
RCAP2H
TL2
TH2
TA
PSW
WDCON
ACC
EIE
Reset Value
00000000b
00000000b
11111111b
x0000000b
00000000b
00000000b
00000x00b
00000000b
00000000b
00000000b
00000000b
11111111b
00000000b
0x0x0xx0b
00000000b
xxx00000b
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Publication Release Date: July 2000
Revision A1