W77IE58 Datasheet, PDF (59/90 Pages) Winbond – 8-BIT MICROCONTROLLER

Preliminary W77IE58
Clock Source
Mode input
div. by 4
osc/1
div. by 64 osc/16
div. by 1024 osc/256
T0 = P3.4
(T1 = P3.5)
T0M = CKCON.3
(T1M = CKCON.4)
1/4
C/T = TMOD.2
1 (C/T = TMOD.6)
1/12 ⁰
0
1
TR0 = TCON.4
(TR1 = TCON.6)
GATE = TMOD.3
(GATE = TMOD.7)
INT0 = P3.2
(INT1 = P3.3)
Timer 1 functions are shown in brackets
M1, M0 = TMOD.1, TMOD.0
(M1, M0 = TMOD.5, TMOD.4)
00
0
4
7
TL0
(TL1)
0
7
01
TH0
(TH1)
TFx
TF0
(TF1)
Interrupt
Figure 11. Timer/Counter Mode 0 & Mode 1
MODE 1
Mode 1 is similar to Mode 0 except that the counting register forms a 16 bit counter, rather than a 13 bit
counter. This means that all the bits of THx and TLx are used. Roll-over occurs when the timer moves
from a count of FFFFh to 0000h. The timer overflow flag TFx of the relevant timer is set and if enabled an
interrupt will occur. The selection of the time-base in the timer mode is similar to that in Mode 0. The
gate function operates similarly to that in Mode 0.
MODE 2
In Mode 2, the timer/counter is in the Auto Reload Mode. In this mode, TLx acts as a 8 bit count
register, while THx holds the reload value. When the TLx register overflows from FFh to 00h, the TFx bit
in TCON is set and TLx is reloaded with the contents of THx, and the counting process continues from
here. The reload operation leaves the contents of the THx register unchanged. Counting is enabled by
the TRx bit and proper setting of GATE and INTx pins. As in the other two modes 0 and 1 mode 2
allows counting of either clock cycles (clock/12 or clock/4) or pulses on pin Tn.
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Publication Release Date: July 2000
Revision A1