W83697HG Datasheet, PDF (69/109 Pages) Winbond – WINBOND LPC I/O

W83697HF/ HG
CR23 (Default 0x00)
Bit 7 ~ 1: Reserved.
Bit 0: IPD (Immediate Power Down). When set to 1, it will put the whole chip into power down
mode immediately.
CR24 (Default 0x00)
Bit 7 : Reserved.
Bit 6: CLKSEL(Enable 48Mhz)
= 0 The clock input on Pin 1 should be 24 Mhz.
= 1 The clock input on Pin 1 should be 48 Mhz.
The corresponding power-on setting pin is SOUTB (pin 61).
Bit[5:4]: ROM size select
=00 1M
=01 2M
=10 4M
=11 Reserved
Bit3:MEMW# Select (PIN97)
= 0 MEMW# Disable
= 1 MEMW# Enable
Bit2:Reserved
Bit1 : Enable Flash ROM Interface
= 0 Flash ROM Interface is enabled after hardware reset
= 1 Flash ROM Interface is disabled after hardware reset
This bit is read only, and set/reset by power-on setting pin. The corresponding power-on
setting pin is PENROM#(pin 52)
Bit 0: PNPCSV#
= 0 The Compatible PnP address select registers have default values.
= 1 The Compatible PnP address select registers have no default value.
The corresponding power-on setting pin is DTRA# (pin 50).
CR25 (Default 0x00)
Bit 7 ~ 4: Reserved
Bit 3: URBTRI
Bit 2: URATRI
Bit 1: PRTTRI
Bit 0: FDCTRI.
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