W83697HG Datasheet, PDF (3/109 Pages) Winbond – WINBOND LPC I/O

W83697HF/ HG
7.1 Plug and Play Configuration ......................................................................................... 62
7.2 Compatible PnP............................................................................................................ 62
7.2.1 Extended Function Registers..........................................................................................62
7.2.2 Extended Functions Enable Registers (EFERs) .............................................................63
7.2.3 Extended Function Index Registers (EFIRs), Extended Function Data Registers(EFDRs)
63
7.3 Configuration Sequence ............................................................................................... 63
7.3.1 Enter the extended function mode..................................................................................63
7.3.2 Configurate the configuration registers ...........................................................................63
7.3.3 Exit the extended function mode ....................................................................................63
7.3.4 Software programming example .....................................................................................64
7.4 Chip (Global) Control Register ..................................................................................... 65
7.5 Logical Device 0 (FDC)................................................................................................. 70
7.6 Logical Device 1 (Parallel Port) .................................................................................... 73
7.7 Logical Device 2 (UART A)........................................................................................... 74
7.8 Logical Device 3 (UART B)........................................................................................... 75
7.9 Logical Device 6 (CIR).................................................................................................. 76
7.10 Logical Device 7 (Game Port GPIO Port 1).................................................................. 77
7.11 Logical Device 8 (MIDI Port and GPIO Port 5) ............................................................. 78
7.12 Logical Device 9 (GPIO Port 2 ~ GPIO Port 4 ) ........................................................... 80
7.13 Logical Device A (ACPI) ............................................................................................... 82
7.14 Logical Device B (Hardware Monitor)........................................................................... 87
8. SPECIFICATIONS .................................................................................................................... 88
8.1 Absolute Maximum Ratings .......................................................................................... 88
8.2 DC CHARACTERISTICS.............................................................................................. 88
9. APPLICATION CIRCUITS ........................................................................................................ 96
9.1 Parallel Port Extension FDD ......................................................................................... 96
9.2 Parallel Port Extension 2FDD ....................................................................................... 97
9.3 Four FDD Mode ............................................................................................................ 97
10. ORDERING INSTRUNCTION .................................................................................................. 98
11. HOW TO READ THE TOP MARKING...................................................................................... 98
12. PACKAGE DIMENSIONS ......................................................................................................... 99
13. APPENDIX A : DEMO CIRCUIT ............................................................................................. 100
14. REVISION HISTORY .............................................................................................................. 105
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Publication Release Date: May 30, 2005
Revision A1