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W972GG8JB-3-TR Datasheet, PDF (63/87 Pages) Winbond – 32M 8 BANKS 8 BIT DDR2 SDRAM
W972GG8JB
DQS
DQS
VDDQ
tDS
tDH
tDS
tDH
VIH(ac)min
VREF to AC
region
VIH(dc)min
VREF(dc)
VIL(dc)max
nominal
line
tangent
line
tangent
line
VIL(ac)max
VREF to AC
region
nominal
line
VSS
ΔTF
ΔTR
Setup Slew Rate tangent line[VIH(ac)min - VREF(dc)]
Rising Signal =
ΔTR
Setup Slew Rate tangent line[VREF(dc) - VIL(ac)max]
Falling Signal =
ΔTF
Figure 25 – Illustration of tangent line for tDS (differential DQS, DQS )
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Publication Release Date: Dec. 03, 2012
Revision A03