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W972GG8JB-3-TR Datasheet, PDF (62/87 Pages) Winbond – 32M 8 BANKS 8 BIT DDR2 SDRAM
W972GG8JB
DQS
DQS
VDDQ
tDS tDH
VIH(ac)min
VREF to AC
region
VIH(dc)min
VREF(dc)
VIL(dc)max
nominal
slew rate
VIL(ac)max
tDS tDH
nominal
slew rate
VREF to AC
region
VSS
ΔTF
ΔTR
Setup Slew Rate
Falling Signal
=
VREF(dc) - VIL(ac)max
ΔTF
Setup Slew Rate
Rising Signal
VIH(ac)min - VREF(dc)
=
ΔTR
Figure 24 – Illustration of nominal slew rate for tDS (differential DQS, DQS )
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Publication Release Date: Dec. 03, 2012
Revision A03