W9812G6IH Datasheet, PDF (6/42 Pages) Winbond – high-speed synchronous dynamic random access memory (SDRAM)

6. BLOCK DIAGRAM
CLK
CKE
CLOCK
BUFFER
CS
RAS
CAS
WE
COMMAND
DECODER
CONTROL
SIGNAL
GENERATOR
A10
A0
A9
A11
BS0
BS1
ADDRESS
BUFFER
MODE
R E G IS T E R
REFRESH
COUNTER
COLUMN
COUNTER
COLUMN DECODER
R
O
W
D
E
CELL ARRAY
C
BANK #0
O
D
E
R
SENSE AM PLIFIER
DATA CONTROL
CIRCUIT
COLUMN DECODER
R
O
W
D ^{CELL ARRAY}
E
C
BANK #2
O
D
E
R
SEN SE AMPLIFIER
W9812G6IH
COLUMN DECODER
R
O
W
D
E
CELL ARRAY
C
O
BANK #1
D
E
R
SENSE AM PLIFIER
DMn
DQ
BUFFER
DQ0
DQ15
UDQM
LDQM
COLUMN DECODER
R
O
W
D
CELL ARRAY
E
C
BANK #3
O
D
E
R
SENSE AMPLIFIER
Note: The cell array configuration is 4096 * 512 * 16.
Publication Release Date:Jun. 05, 2008
-6-
Revision A03