W9812G6IH Datasheet, PDF (19/42 Pages) Winbond – high-speed synchronous dynamic random access memory (SDRAM)

W9812G6IH
10.3 Control Timing of Input/Output Data
Control Timing of Input Data
(Word Mask)
CLK
tCMH
tCMS
tCMH
DQM
DQ0 -15
tDS
tDH
Valid
Data-in
(Clock Mask)
CLK
tCKH
tCKS
tCKH
tCMS
tDS
tDH
Valid
Data-in
tCKS
CKE
DQ0 -15
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
tDS
tDH
Valid
Data-in
Control Timing of Output Data
(Output Enable)
CLK
tCMH
tCMS
tCMH
DQM
DQ0 -15
(Clock Mask)
tAC
tOH
tAC
tOH
Valid
Data-Out
tCMS
tHZ
tOH
Valid
Data-Out
tAC
tLZ
OPEN
CLK
tCKH
tCKS
tCKH
tCKS
CKE
DQ0 -15
tAC
tOH
tAC
tOH
Valid
Data-Out
Valid
Data-Out
tAC
tOH
tAC
tOH
Valid
Data-Out
tAC
tOH
Valid
Data-Out
Publication Release Date:Jun. 05, 2008
- 19
-Revision A03