W9812G6IH Datasheet, PDF (39/42 Pages) Winbond – high-speed synchronous dynamic random access memory (SDRAM)

11.21 CKE/DQM Input Timing (Write Cycle)
W9812G6IH
CLK cycle No.
1
2
CLK
External
Internal
CKE
DQM
DQ
D1
D2
CLK cycle No.
1
2
CLK
External
Internal
CKE
DQM
DQ
D1
D2
CLK cycle No.
CLK
External
Internal
CKE
DQM
DQ
1
D1
2
D2
3
4
5
6
7
D3
DQM MASK
(1)
D5
D6
CKE MASK
3
4
5
6
7
D3
D5
D6
DQM MASK
(2)
CKE MASK
3
4
5
6
7
D3
D4
CKE MASK
(3)
D5
D6
Publication Release Date:Jun. 05, 2008
- 39
-Revision A03