W9812G6IH Datasheet, PDF (15/42 Pages) Winbond – high-speed synchronous dynamic random access memory (SDRAM)

W9812G6IH
9.5 AC Characteristics and Operating Condition
(VDD = 3.3V ± 0.3V, TA = 0 to 70°C for -5/-6/-6C/-75, TA= -40 to 85°C for -6I) (Notes: 5, 6)
PARAMETER
SYM.
Ref/Active to Ref/Active Command
Period
t_RC
Active to precharge Command Period t_RAS
Active to Read/Write Command Delay
Time
t_RCD
-5
-6
-6C/-6I
-75
UNIT NOTES
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
55
60
60
65
40 100000 42 100000 42 100000 45 100000 nS
15
18
18
20
Read/Write(a) to Read/Write(b)
Command Period
t_CCD
1
1
1
1
t_CK
Precharge to Active Command Period t_RP
15
18
18
20
Active(a) to Active(b) Command
Period
t_RRD
10
12
12
15
nS
CL* = 2
2
2
2
2
Write Recovery Time
t_WR
t_CK
CL* = 3
2
2
2
2
CLK Cycle Time
CL* = 2
CL* = 3
10 1000 10 1000 --
t_CK
5
6
6
--
10 1000
7.5
CLK High Level width
t_CH
2
2
2
2.5
8
CLK Low Level width
t_CL
2
2
2
2.5
8
CL* = 2
6
6
Access Time from CLK
t_AC
CL* = 3
4.5
5
--
6
9
5
5.4
Output Data Hold Time
t_OH
2
2
2
2
9
Output Data High
Impedance Time
CL* = 2
t_HZ
CL* = 3
6
4.5
6
5
--
6
7
5
5.4
Output Data Low Impedance Time
t_LZ
0
0
0
0
9
Power Down Mode Entry Time
t_SB
0
5
0
6
0
6
0
7.5 nS
Transition Time of CLK (Rise and Fall) t_T
1
1
1
1
Data-in Set-up Time
t_DS
1.5
1.5
1.5
1.5
8
Data-in Hold Time
t_DH
1.0
1.0
0.8
1.0
8
Address Set-up Time
t_AS
1.5
1.5
1.5
1.5
8
Address Hold Time
t_AH
1.0
1.0
0.8
1.0
8
CKE Set-up Time
t_CKS
1.5
1.5
1.5
1.5
8
CKE Hold Time
t_CKH
1.0
1.0
0.8
1.0
8
Command Set-up Time
t_CMS
1.5
1.5
1.5
1.5
8
Command Hold Time
t_CMH
1.0
1.0
0.8
1.0
8
Refresh Time
t_REF
64
64
64
64 mS
Mode register Set Cycle Time
t_RSC
10
12
12
15
nS
Exit self refresh to ACTIVE command t_XSR
70
72
72
75
nS
*CL = CAS Latency
* -- = not support
Publication Release Date:Jun. 05, 2008
- 15
-Revision A03