W25Q64FV_13 Datasheet, PDF (54/89 Pages) Winbond – 3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI

W25Q64FV
6.2.28 Power-down (B9h)
Although the standby current during normal operation is relatively low, standby current can be further
reduced with the Power-down instruction. The lower power consumption makes the Power-down
instruction especially useful for battery powered applications (See ICC1 and ICC2 in AC Characteristics).
The instruction is initiated by driving the /CS pin low and shifting the instruction code “B9h” as shown in
Figure 27a & 27b.
The /CS pin must be driven high after the eighth bit has been latched. If this is not done the Power-down
instruction will not be executed. After /CS is driven high, the power-down state will entered within the time
duration of tDP (See AC Characteristics). While in the power-down state only the Release from Power-
down / Device ID instruction, which restores the device to normal operation, will be recognized. All other
instructions are ignored. This includes the Read Status Register instruction, which is always available
during normal operation. Ignoring all but one instruction makes the Power Down state a useful condition
for securing maximum write protection. The device always powers-up in the normal operation with the
standby current of ICC1.
/CS
CLK
Mode 3
Mode 0
DI
(IO₀)
01234567
Instruction (B9h)
tDP
Mode 3
Mode 0
Stand-by current
Power-down current
Figure 27a. Deep Power-down Instruction (SPI Mode)
/CS
CLK
IO₀
Mode 3
Mode 0
01
Instruction
B9h
IO₁
IO₂
IO₃
tDP
Mode 3
Mode 0
Stand-by current
Power-down current
Figure 27b. Deep Power-down Instruction (QPI Mode)
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