W921E840A Datasheet, PDF (48/58 Pages) Winbond – 4-BIT MICROCONTROLLER

W921E840A/W921C840
9.2.1 Direct Addressing Mode: (2 words/2 cycles)
ROM CODE _{b9 b8 b7 b6 b5 b4 b3 b2 b1 b0}
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
decoder code
RAM ADDRESS
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Instruction: MOV A, Mx; MOV B, Mx; MOV Mx, A; MOV Mx, B; ..., etc.
9.2.2 Indirect Addressing Mode: (1 word/1 cycle)
W
V
Register Register
U
Register
b1 b0 b3 b2 b1 b0 b3 b2 b1 b0
RAM ADDRESS _{b9 b8 b7 b6 b5 b4 b3 b2 b1 b0}
Instruction: MOV A, @M; MOV B, @M; MOV @M, A; ..., etc.
9.2.3 Working Register Addressing Mode: (1 word/1 cycle)
ROM CODE
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
decoder code
RAM ADDRESS
0 0 0 1 0 0 m3 m2 m1 m0
Instruction: MOV A, WRn; MOV WRn, A; ..., etc.
9.3 Look-up Table Addressing Mode (1 word/2 cycles)
There is one special function look-up table addressing mode in this chip; the instruction is TBL I and
the function is shown in the following table.
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