W921E840A Datasheet, PDF (31/58 Pages) Winbond – 4-BIT MICROCONTROLLER

W921E840A/W921C840
The TM1 read register is divided into TM1 read only MSB data register (TM1RM register, address =
01CH, default = 0FH) and TM1 read only LSB data register (TM1RL register, address = 01DH, default
= 0FH).
The format of the TM1 status register (STTM1) is described below:
STTM1 register: (address = 028H, default data = 0H)
b3
b2
b1
b0
0: TM1 normal function selected
1: Special function selected
Reserved
0:TM1 auto-reload disable
1:TM1 auto-reload enable
0:TM1 stop
1:TM1 start
If the TM1 is in the timer mode, TM1 will underflow when it is from 00H to 0FFH and the value in the
TM1MSB and TM1LSB will be auto reloaded into the TM1 set register when the STTM1 bit2 is set.
TM1 will decrease by 1 at the frequency of timer 1 clock after timer 1 has started.
At any time the STTM1 bit3 is from 0 to 1 (disable to enable) the TM1MSB and TM1LSB will be auto
reloaded to the TM1 set register again and restart the TM1. TM1 will stop operating while the STTM1
bit3 is reset to 0.
The TM1 starts to down count when the STTM1 register bit3 is set. When TM1 underflows, the
STTM1 bit3 will be reset by hardware to stop TM1 if the auto-reload is disabled, but the STTM1 bit3
will not be reset if the auto-reload is enable.
When the TM1 normal timer function is performed, the special function (event counter or arbitrary
waveform generator) will be disabled automatically. The special function input or output is from or to
P5.0 and the debounce time is one system clock (f_SYS).
The format of the TM1 trigger/event counter condition register (TGTM1) is described below:
TGTM1 register: (address = 029H, default data = 0H)
b3
b2
b1
b0
Reserved
0: Event counter is falling edge trigger
1: Event counter is rising edge trigger
0: Special function work as event counter
1: Special function work as arbitrary
waveform generator
0: Arbitrary waveform type 0
1: Arbitrary waveform type 1
- 31 -
Publication Release Date: July 1999
Revision A3